ZHCS921A May   2012  – January 2016 ADS4128

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Electrical Characteristics: General
    7. 7.7  Digital Characteristics
    8. 7.8  Timing Requirements: LVDS and CMOS Modes
    9. 7.9  Reset Timing Requirements
    10. 7.10 Typical Characteristics
    11. 7.11 Typical Characteristics: Contour
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Migrating From the ADS6149 Family
      2. 8.3.2 Digital Functions and Low-Latency Mode
      3. 8.3.3 Gain for SFDR and SNR Trade-Off
      4. 8.3.4 Offset Correction
      5. 8.3.5 Power Down
        1. 8.3.5.1 Global Power-Down
        2. 8.3.5.2 Standby
        3. 8.3.5.3 Output Buffer Disable
        4. 8.3.5.4 Input Clock Stop
      6. 8.3.6 Power-Supply Sequence
      7. 8.3.7 Output Data Format
    4. 8.4 Device Functional Modes
      1. 8.4.1 Output Interface Modes
        1. 8.4.1.1 Output Interface
        2. 8.4.1.2 DDR LVDS Outputs
        3. 8.4.1.3 LVDS Output Data and Clock Buffers
        4. 8.4.1.4 Parallel CMOS Interface
        5. 8.4.1.5 CMOS Interface Power Dissipation
        6. 8.4.1.6 Input Over-Voltage Indication (OVR Pin)
    5. 8.5 Programming
      1. 8.5.1 Serial Register Readout
      2. 8.5.2 Serial Interface
        1. 8.5.2.1 Register Initialization
    6. 8.6 Register Maps
      1. 8.6.1 Serial Interface Register Map
      2. 8.6.2 Register Description
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Analog Input
      2. 9.1.2 Driving Circuit
        1. 9.1.2.1 Drive Circuit Requirements
      3. 9.1.3 Analog Input
        1. 9.1.3.1 Input Common-Mode
      4. 9.1.4 Clock Input
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Analog Input
        2. 9.2.2.2 Clock Driver
        3. 9.2.2.3 Digital Interface
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Sharing DRVDD and AVDD Supplies
    2. 10.2 Using DC/DC Power Supplies
    3. 10.3 Power Supply Bypassing
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Grounding
      2. 11.1.2 Supply Decoupling
      3. 11.1.3 Exposed Pad
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 器件命名规则
    2. 12.2 文档支持
      1. 12.2.1 相关文档 
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Device Comparison Table

FAMILY SAMPLING RATE WITH ANALOG INPUT BUFFERS
65 MSPS 125 MSPS 160 MSPS 200 MSPS 250 MSPS 200 MSPS 250 MSPS
ADS412x
12-bit family
ADS4122 ADS4125 ADS4126 ADS4128 ADS4129 ADS41B29
ADS414x
14-bit family
ADS4142 ADS4145 ADS4146 ADS4149 ADS41B49
9-bit ADS58B19
11-bit ADS58B18