ZHCSHA6F May 2009 – January 2025 ADS1013 , ADS1014 , ADS1015
PRODUCTION DATA
A programmable gain amplifier (PGA) is implemented before the ΔΣ ADC of the ADS1014 and ADS1015. The full-scale range is configured by bits PGA[2:0] in the Config register and can be set to ±6.144V, ±4.096V, ±2.048V, ±1.024V, ±0.512V, or ±0.256V. Table 7-1 shows the FSR together with the corresponding LSB size. Equation 2 shows how to calculate the LSB size from the selected full-scale range.
| FSR | LSB SIZE |
|---|---|
| ±6.144V(1) | 3mV |
| ±4.096V(1) | 2mV |
| ±2.048V | 1mV |
| ±1.024V | 0.5mV |
| ±0.512V | 0.25mV |
| ±0.256V | 0.125mV |
The FSR of the ADS1013 is fixed at ±2.048V.
Analog input voltages must never exceed the analog input voltage limits given in the Absolute Maximum Ratings. If a VDD supply voltage greater than 4V is used, the ±6.144V full-scale range allows input voltages to extend up to the supply. Although in this case (or whenever the supply voltage is less than the full-scale range), a full-scale ADC output code cannot be obtained. For example, with VDD = 3.3V and FSR = ±4.096V, only differential signals up to VIN = ±3.3V can be measured. The code range that represents voltages |VIN| > 3.3V is not used in this case.