SNAS279F April   2005  – July 2016 ADC084S021

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Transfer Function
      2. 8.3.2 Analog Inputs
      3. 8.3.3 Digital Inputs and Outputs
    4. 8.4 Device Functional Modes
      1. 8.4.1 Track Mode
      2. 8.4.2 Hold Mode
    5. 8.5 Register Maps
      1. 8.5.1 Register Description
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Power Management
    2. 10.2 Noise Considerations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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12 Device and Documentation Support

12.1 Device Support

12.1.1 Device Nomenclature

    ACQUISITION TIME

    is the time required to acquire the input voltage. That is, it is time required for the hold capacitor to charge up to the input voltage.

    APERTURE DELAY

    is the time between the fourth falling SCLK edge of a conversion and the time when the input signal is acquired or held for conversion.

    CONVERSION TIME

    is the time required, after the input voltage is acquired, for the ADC to convert the input voltage to a digital word.

    CROSSTALK

    is the coupling of energy from one channel into the other channel, or the amount of signal energy from one analog input that appears at the measured analog input.

    DIFFERENTIAL NON-LINEARITY (DNL)

    is the measure of the maximum deviation from the ideal step size of 1 LSB.

    DUTY CYCLE

    is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The specification here refers to the SCLK.

    EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS)

    is another method of specifying Signal-to-Noise and Distortion or SINAD. ENOB is defined as (SINAD − 1.76) / 6.02 and says that the converter is equivalent to a perfect ADC of this (ENOB) number of bits.

    FULL POWER BANDWIDTH

    is a measure of the frequency at which the reconstructed output fundamental drops 3 dB below its low frequency value for a full scale input.

    FULL SCALE ERROR (FSE)

    is a measure of how far the last code transition is from the ideal 1½ LSB below VREF+ and is defined with Equation 1.

    Equation 1. VFSE = Vmax + 1.5 LSB – VREF+

    where

    • Vmax is the voltage at which the transition to the maximum code occurs
    • FSE can be expressed in Volts, LSB or percent of full scale range
    GAIN ERROR

    is the deviation of the last code transition (111...110) to (111...111) from the ideal (VREF − 1.5 LSB), after adjusting for offset error.

    INTEGRAL NON-LINEARITY (INL)

    is a measure of the deviation of each individual code from a line drawn from negative full scale (½ LSB below the first code transition) through positive full scale (½ LSB above the last code transition). The deviation of any given code from this straight line is measured from the center of that code value.

    INTERMODULATION DISTORTION (IMD)

    is the creation of additional spectral components as a result of two sinusoidal frequencies being applied to the ADC input at the same time. It is defined as the ratio of the power in the second and third order intermodulation products to the sum of the power in both of the original frequencies. IMD is usually expressed in dB.

    MISSING CODES

    are those output codes that never appears at the ADC outputs. These codes cannot be reached with any input value. The ADC084S021 is ensured not to have any missing codes.

    OFFSET ERROR

    is the deviation of the first code transition (000...000) to (000...001) from the ideal (that is, GND + 0.5 LSB).

    SIGNAL TO NOISE RATIO (SNR)

    is the ratio, expressed in dB, of the rms value of the input signal at the converter output to the rms value of the sum of all other spectral components below one-half the sampling frequency, not including DC or harmonics included in the THD specification.

    SIGNAL TO NOISE PLUS DISTORTION (S/N+D or SINAD)

    is the ratio, expressed in dB, of the rms value of the input signal to the rms value of all of the other spectral components below half the clock frequency, including harmonics but excluding dc

    SPURIOUS FREE DYNAMIC RANGE (SFDR)

    is the difference, expressed in dB, between the rms values of the input signal and the peak spurious signal where a spurious signal is any signal present in the output spectrum that is not present at the input, excluding dc

    TOTAL HARMONIC DISTORTION (THD)

    is the ratio, expressed in dB or dBc, of the rms total of the first five harmonic components at the output to the rms level of the input signal frequency as seen at the output. THD is calculated with Equation 2.

    Equation 2. ADC084S021 20124599.gif

    where

    • Af1 is the RMS power of the input frequency at the output
    • Af2 through Af6 are the RMS power in the first 5 harmonic frequencies
    THROUGHPUT TIME

    is the minimum time required between the start of two successive conversion. It is the acquisition time plus the conversion and read out times. In the case of the ADC084S021, this is 16 SCLK periods.

12.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

12.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

12.4 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

12.5 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

12.6 Glossary

SLYZ022TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.