ZHCSH77D June   2017  – May 2019 DAC8740H , DAC8741H

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      简化原理图
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions: DAC8740H
    2.     Pin Functions: DAC8741H
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  HART Modulator
      2. 8.3.2  HART Demodulator
      3. 8.3.3  FOUNDATION Fieldbus or PROFIBUS PA Manchester Encoder
      4. 8.3.4  FOUNDATION Fieldbus or PROFIBUS PA Manchester Decoder
      5. 8.3.5  Internal Reference
      6. 8.3.6  Clock Configuration
      7. 8.3.7  Reset and Power-Down
      8. 8.3.8  Full-Duplex Mode
      9. 8.3.9  I/O Selection
      10. 8.3.10 Jabber Inhibitor
    4. 8.4 Device Functional Modes
      1. 8.4.1 UART Interfaced HART
      2. 8.4.2 UART Interfaced FOUNDATION Fieldbus or PROFIBUS PA
      3. 8.4.3 SPI Interfaced HART
      4. 8.4.4 SPI Interfaced FOUNDATION Fieldbus or PROFIBUS PA
      5. 8.4.5 Digital Interface
        1. 8.4.5.1 UART
          1. 8.4.5.1.1 UART Carrier Detect
        2. 8.4.5.2 SPI
          1. 8.4.5.2.1 SPI Cyclic Redundancy Check
          2. 8.4.5.2.2 SPI Interrupt Request
    5. 8.5 Register Maps
      1. 8.5.1 CONTROL Register (Offset = 2h) [reset = 0x8042]
        1. Table 9. CONTROL Register Field Descriptions
      2. 8.5.2 RESET Register (Offset = 7h) [reset = 0x0000]
        1. Table 10. RESET Register Field Descriptions
      3. 8.5.3 MODEM_STATUS Register (Offset = 20h) [reset = 0x0000]
        1. Table 11. MODEM_STATUS Register Field Descriptions
      4. 8.5.4 MODEM_IRQ_MASK Register (Offset = 21h) [reset = 0x0024]
        1. Table 12. MODEM_IRQ_MASK Register Field Descriptions
      5. 8.5.5 MODEM_CONTROL Register (Offset = 22h) [reset = 0x0048]
        1. Table 13. MODEM_CONTROL Register Field Descriptions
      6. 8.5.6 FIFO_D2M Register (Offset = 23h) [reset = 0x0200]
        1. Table 14. FIFO_D2M Register Field Descriptions
      7. 8.5.7 FIFO_M2D Register (Offset = 24h) [reset = 0x0200]
        1. Table 15. FIFO_M2D Register Field Descriptions
      8. 8.5.8 FIFO_LEVEL_SET Register (Offset = 25h) [reset = 0x0000]
        1. Table 16. FIFO_LEVEL_SET Register Field Descriptions
      9. 8.5.9 PAFF_JABBER Register (Offset = 27h) [reset = 0x0000]
        1. Table 17. PAFF_JABBER Register Field Descriptions
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Design Recommendations
      2. 9.1.2 Selecting the Crystal or Resonator
      3. 9.1.3 Included Functions and Filter Selection
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 DAC8740H HART Modem
        2. 9.2.2.2 2-Wire Current Loop
        3. 9.2.2.3 Regulator
        4. 9.2.2.4 DAC
        5. 9.2.2.5 Amplifiers
        6. 9.2.2.6 Diodes
        7. 9.2.2.7 Passives
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 相关链接
    3. 12.3 接收文档更新通知
    4. 12.4 社区资源
    5. 12.5 商标
    6. 12.6 静电放电警告
    7. 12.7 Glossary
  13. 13机械、封装和可订购信息

Typical Characteristics

DAC8740H DAC8741H D002_SBAS856_HART_EXT_BPF.gif
Figure 2. HART Mode External Band-Pass Filter Response
DAC8740H DAC8741H D004_SBAS856_PAFF_EXT_BPF.gif
Figure 4. FF / PA Mode External Band-Pass Filter Response
DAC8740H DAC8741H D006_SBAS856_VREF_v_AVDD.gif
Figure 6. Internal Reference Voltage vs AVDD
DAC8740H DAC8741H D008_SBAS856_HART_Carrier_Start.gif
Figure 8. HART TX Carrier Start Time
DAC8740H DAC8741H D010_SBAS856_HART_RX_Stop.gif
Figure 10. HART RX Carrier Detect Off Timing
DAC8740H DAC8741H D012_SBAS856_IOVDD_Current_EXT_REF.gif
Figure 12. HART Mode IOVDD Supply Current vs Voltage With External Reference
DAC8740H DAC8741H D016_SBAS856_IOVDD_Current_INT_REF.gif
Figure 14. HART Mode IOVDD Supply Current vs Voltage With Internal Reference
DAC8740H DAC8741H D014_SBAS856_PAFF_IOVDD_IQ_EXT_REF.gif
Figure 16. FF / PA Mode IOVDD Supply Current vs Voltage With External Reference
DAC8740H DAC8741H D018_SBAS856_PAFF_IOVDD_IQ_INT_REF.gif
Figure 18. FF / PA Mode IOVDD Supply Current vs Voltage With Internal Reference
DAC8740H DAC8741H D020_SBAS856_PAFF_NoFilter_Transient.gif
Figure 20. Typical Manchester Encoded Trapezoid, No Filter
DAC8740H DAC8741H D025_SBAS856_MOD_OUT_v_Rload.gif
Figure 22. MOD_OUT Voltage vs RLOAD
DAC8740H DAC8741H D003_SBAS856_HART_INT_BPF.gif
Figure 3. HART Mode Internal Band-Pass Filter Response
DAC8740H DAC8741H D005_SBAS856_PAFF_INT_BPF.gif
Figure 5. FF / PA Mode Internal Band-Pass Filter Response
DAC8740H DAC8741H D007_SBAS856_VREF_v_Temp.gif
Figure 7. Internal Reference Voltage vs Temperature
DAC8740H DAC8741H D009_SBAS856_HART_Carrier_Stop.gif
Figure 9. HART TX Carrier Stop / Decay Time
DAC8740H DAC8741H D011_SBAS856_HART_RX_Start.gif
Figure 11. HART RX Carrier Detect On Timing
DAC8740H DAC8741H D013_SBAS856_AVDD_Current_EXT_REF.gif
Figure 13. HART Mode AVDD Supply Current vs Voltage With External Reference
DAC8740H DAC8741H D017_SBAS856_AVDD_Current_INT_REF.gif
Figure 15. HART Mode AVDD Supply Current vs Voltage With Internal Reference
DAC8740H DAC8741H D015_SBAS856_PAFF_AVDD_IQ_EXT_REF.gif
Figure 17. FF / PA Mode AVDD Supply Current vs Voltage With External Reference
DAC8740H DAC8741H D019_SBAS856_PAFF_AVDD_IQ_INT_REF.gif
Figure 19. FF / PA Mode AVDD Supply Current vs Voltage With Internal Reference
DAC8740H DAC8741H D021_SBAS856_PAFF_w_Filter_Transient.gif
Figure 21. Typical Manchester Encoded Trapezoid, With Suggested Filter Response