Using DSPLIB FFT Implementation for Real Input and Without Data Scaling

DSPLIB for TI C64x+ and C66x DSP architecture provides optimized implementation for FFT with assumptions for format and scaling of the input data. The application report provides guidance for users of DSPLIB for the following use cases:

Efficient compute of single precision FFT using real input without reformatting data to complex format
Fixed point FFT compute with no data scaling to avoid overflow

The content discussed benefits all DSPLIB users on C64x+, C674x and C66x DSP devices.

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1 Real Input Introduction

Algorithms to perform forward and Inverse Fast Fourier Transforms (FFT and IFFT) typically assume complex input and output data. However, many applications use only real-valued data in the time domain. A simple but inefficient solution to this problem is to pad N-length real input signals to N-length complex input signals with zero-valued imaginary components.

x_real = { 1, 2, 3, ... }
      
      
x_cplx = { 1, 0, 2, 0, 3, 0, ...}

The complex FFT can then be applied to the double-length sequence. However, this method is obviously inefficient. This topic explains how to use the complex-valued FFT and IFFT algorithms to efficiently process real-valued sequences without padding those sequences. There are two key advantages to this approach:

Lower memory footprint - M bytes per sequence instead of 2M bytes
Fewer cycles - length N/2 FFT and IFFT computation instead of length N

For more information on the derivation of this method, see Implementing Fast Fourier Transform Algorithms of Real-Valued Sequences With the TMS320 DSP Platform.

Example C code for this method is also available for download.

1.1 Prerequisites

Install the C674x DSPLIB or C66x DSPLIB based on the DSP being used.
- Familiarize yourself with the FFT and IFFT kernels
- Look at demo code (*_d.c) for usage examples