SLVUC20A March   2021  – August 2022 LP876242-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Getting Started
    1. 2.1 The GUI Tool
  5. 3EVM Details
    1. 3.1 Terminal Blocks
    2. 3.2 Test Point Descriptions
    3. 3.3 Configuration Headers
    4. 3.4 Connectors
    5. 3.5 DIP Switches
    6. 3.6 EVM Control and GPIO
  6. 4Customization
    1. 4.1 Changing the Communication Interface
  7. 5Schematic, Layout, and Bill of Materials
  8. 6Additional Resources
  9. 7Revision History

3.3 Configuration Headers

There are four headers available to configure the EVM function. Header J18, as shown in the silk screen picture in Figure 3-1, is used to configure the EVM to match the settings written to the LP876242-Q1 configuration registers. J33 is used to select the PMIC IO voltage, either 1.8 V or 3.3 V. The fifth header is J24 which allows VCCA to be powered from the USB connection and the configuration of GPIO2, I2C2 or SPI.

Figure 3-1 EVM Header J18
Table 3-3 Header J18 Description
Option PinsConfigurationDescription
SPI_ENOpenI2C Mode. The signal path for I2C communication between the MCU and the PMIC is enabled.
Closed (Default)SPI mode. The signal path for SPI communication between the MCU and the PMIC is enabled.
GPIO3, SDA2/SDOOpenGPIO mode. GPIO2 from PMIC is connected to PM7 of the MCU through a level translator.
GPIO3,SDA2/SDO: Closed (Default)I2C Mode (J18 VIO, I2C/SPI: Open)Q&A Watchdog mode. GPIO3 supports the Q&A Watchdog when PMIC is in the Alternative function and the I2C mode is selected. This setting is also done on connector J24 by closing GPIO2 to SCL2/CS if I2C2 is wanted to be used.
SPI mode (J18 VIO, I2C/SPI: Closed)SPI mode, Chip Select. GPIO2 and GPIO3 supports SPI communication when the PMIC is in the Alternative function. This setting is also done on connector J24 by closing GPIO2 to SCL2/CS if I2C2 is wanted to be used.
GPIO6, nERR_MCU, GPIO7Open (Default)GPIO mode. GPIO6 of the PMIC is connected to PP5 of the through a level translator.
GPIO6, nERR_MCU Closed

System error count down input signal from the MCU. VIO Select must be 3.3 V. GPIO6 or GPIO7 supports the system error count down from the MCU when the PMIC is in the Alternative function.

nERR_MCU, GPIO7 Closed
GPIO2, TRIG_WDG, GPIO4Open (Default)GPIO mode. GPIO7 of the PMIC is connected to PH0 of the through a level translator.
GPIO2, TRIG_WDG Closed

Trigger signal for trigger mode watchdog. VIO Select must be 3.3 V. GPIO7 or GPIO6 supports the trigger mode watchdog signal when the PMIC is in the Alternative function.

TRIG_WDG, GPIO4 Closed
Table 3-4 Header J33 VIO Voltage Select
ConfigurationDescription
OpenNot Allowed
VIO Select, 3.3 V: Closed (Default)VIO is 3.3 V.
VIO Select, 1.8 V: ClosedVIO is 1.8 V.
Table 3-5 Header J24, 3.3V/5V, GPIO2/I2C/SPI
ConfigurationDescription
3.3V, VCCA: Closed 3.3 V from TLV733P-Q1 (U12) is connected to VCCA. The input for U12 is the 5 V from the USB connection (VBUS). VBUS is not intended to support heavy load conditions. 2 W is the maximum power which can be drawn from the USB. This header configuration is the normal state of EVM.
EN_5V0, 3.3V, VCCA,5.0V: OpenVBUS, and USB_3V3 are isolated. VCCA is powered from J7.
EN_5V0,3.3V: Closed 5V from USB port is enabled. 5V regulated supply can be used to power up VCCA.
VCCA, 5.0V: Closed5 V from USB Port is connected to VCCA. This supply is not intended to support heavy load conditions Do not draw more than 2 W from the USB.
SCL2/CS, GPIO2: OpenGPIO mode. GPIO2 of the PMIC is connected to IO2 of the MCU.
SCL2/CS, GPIO2: Closed (Default)I2C mode (J18 SPI_EN: Open)Q&A Watchdog mode. GPIO2 and GPIO3 supports the Q&A Watchdog when the PMIC is in Alternative function and the I2C mode selected. This setting is also done on connector J18 by closing GPIO3 to SDA2/SDO if I2C2 is wanted to be used.
SPI mode (J18 SPI_EN: Closed)SPI mode, Chip Select. GPIO2 and GPIO3 supports SPI communication when the PMIC is in the Alternative function. This setting is also done on connector J18 by closing GPIO3 to SDA2/SDO.
Note: The PMIC device can be configured for a power good level of 3.3 V or 5.0 V for the VCCA pin. If VCCA_VMON feature is enabled please check that the input voltage is correct and use sense connection to compensate IR voltage drop with heavy load currents. Align the 3.3V/5.0V jumper with the PMIC configuration. The default PMIC configuration supports the whole recommended VCCA voltage range.