SLVUBG8A July   2018  – December 2020 TPS23755

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
  3. 2Electrical Specifications
  4. 3Description
  5. 4Schematic
  6. 5General Configuration and Description
    1. 5.1 Physical Access
  7. 6TPS23755EVM-894 Performance Data
    1. 6.1 Startup to PSE and DCDC Startup
    2. 6.2 Transient Response
    3. 6.3 Efficiency
    4. 6.4 Load Regulation
    5. 6.5 Recovery from VOUT Short
    6. 6.6 Slew Rate Adjust
  8. 7EVM Assembly Drawings and Layout Guidelines
    1. 7.1 PCB Drawings
    2. 7.2 Layout Guidelines
    3. 7.3 EMI Containment
  9. 8Bill of Materials
  10.   Revision History

2 Electrical Specifications

Table 2-1 TPS23755EVM-894 Electrical and Performance Specifications at 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER INTERFACE
Input voltage Applied to the power pins of connectors J1 37 57 V
Applied to the power pins of connectors J5 12 V
Input UVLO, POE input J2 Rising input voltage 36 V
Falling input voltage 30
Detection voltage At device terminals 2.7 10.1 V
Classification voltage At device terminals 14.5 20.5 V
Classification current RCLASS = 45.3 Ω 26.5 29.3 mA
Inrush current-limit 140 mA
Operating current-limit 550 mA
DC-TO-DC CONVERTER
Output voltage VIN = 48 V, ILOAD ≤ ILOAD (max) 12 V
Output current 37 V ≤ VIN ≤ 57 V 1 A
Output ripple voltage peak-to-peak VIN = 48 V, ILOAD = 1 A 50 mV
Efficiency, end-to-end VIN = 48 V, ILOAD= 100 mA 78 %
VIN = 48 V, ILOAD = 500 mA 86
VIN = 48 V, ILOAD = 1 A 87
Switching frequency 250 kHz