SLUS893B March   2010  – June 2015 BQ24620

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Battery Voltage Regulation
      2. 8.3.2  Battery Current Regulation
      3. 8.3.3  Precharge
      4. 8.3.4  Charge Termination, Recharge, and Safety Timer
      5. 8.3.5  Power Up
      6. 8.3.6  Enable and Disable Charging
      7. 8.3.7  Automatic Internal Soft-Start Charger Current
      8. 8.3.8  Converter Operation
      9. 8.3.9  Synchronous and Nonsynchronous Operation
      10. 8.3.10 Cycle-by-Cycle Charge Undercurrent
      11. 8.3.11 Input Overvoltage Protection (ACOV)
      12. 8.3.12 Input Undervoltage Lockout (UVLO)
      13. 8.3.13 Battery Overvoltage Protection
      14. 8.3.14 Cycle-by-Cycle Charge Overcurrent Protection
      15. 8.3.15 Thermal Shutdown Protection
      16. 8.3.16 Temperature Qualification
      17. 8.3.17 Timer Fault Recovery
      18. 8.3.18 PG Output
      19. 8.3.19 CE (Charge Enable)
      20. 8.3.20 Charge Status Outputs
      21. 8.3.21 Battery Detection
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input Capacitor
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 Power MOSFET Selection
        5. 9.2.2.5 Input Filter Design
        6. 9.2.2.6 Inductor, Capacitor, and Sense Resistor Selection Guidelines
        7. 9.2.2.7 Maximum Output Capacitance
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

6 Pin Configuration and Functions

RVA Package
16-Pin VQFN
Top View
bq24620 po_lus893.gif

Pin Functions

PIN DESCRIPTION
NAME NO.
BTST 16 PWM high-side driver negative supply. Connect the 0.1-μF bootstrap capacitor from PH to BTST, and a bootstrap Schottky diode from REGN to BTST.
CE 2 Charge enable active-HIGH logic input. HI enables charge. LO disables charge. The CE pin has an internal 1-MΩ pulldown resistor.
GND 11 Low-current sensitive analog/digital ground. On PCB layout, connect with thermal pad underneath the IC.
HIDRV 15 PWM high-side driver output. Connect to the gate of the high-side power MOSFET with a short trace.
ISET 7 Charge current set input. The voltage of ISET pin programs the charge current regulation, precharge current and termination current set-point.
LODRV 13 PWM low-side driver output. Connect to the gate of the low-side power MOSFET with a short trace.
PG 5 Open-drain power good status output. The transistor turns on when a valid VCC is detected. The transistor is turned off in the sleep mode. PG can be used to drive an LED or communicate with a host processor. The PG pin can be used to drive ACFET and BATFET.
PH 14 PWM high-side driver negative supply. Connect to the phase-switching node (junction of the low-side power MOSFET drain, high-side power MOSFET source, and output inductor).
REGN 12 PWM low-side driver positive 6-V supply output. Connect a 1-μF ceramic capacitor from REGN to the PGND pin, close to the IC. Use for low-side driver and high-side driver bootstrap voltage by connecting a small-signal Schottky diode from REGN to BTST.
SRN 9 Charge current sense resistor, negative input. A 0.1-μF ceramic capacitor is placed from SRN to SRP to provide differential-mode filtering. An optional 0.1-μF ceramic capacitor is placed from the SRN pin to GND for common-mode filtering.
SRP 10 Charge current sense resistor, positive input. A 0.1-μF ceramic capacitor is placed from SRN to SRP to provide differential-mode filtering. A 0.1-μF ceramic capacitor is placed from SRP pin to GND for common-mode filtering.
STAT 3 Open-drain charge status pin to indicate various charger operations (See Table 2)
Thermal pad — Exposed pad beneath the IC. Always solder the thermal pad to the board, and have vias on the thermal-pad plane star-connecting to GND and ground plane for high-current power converter. It also serves as a thermal pad to dissipate the heat.
TS 4 Temperature qualification voltage input for battery pack negative-temperature-coefficient thermistor. Program the hot and cold temperature window with a resistor divider from VREF to TS to GND.
VCC 1 IC power positive supply. Connect through a 10-Ω resistor to the common-source (diode-OR) point: source of high-side P-channel MOSFET and source of reverse-blocking power P-channel MOSFET. Or connect through a 10-Ω resistor to the cathode of the input diode. Place a 1-μF ceramic capacitor from VCC to GND pin close to the IC.
VFB 8 Output voltage analog feedback adjustment. Connect the output of a resistive voltage divider from the battery terminals to this node to adjust the output battery regulation voltage.
VREF 6 3.3-V regulated voltage output. Place a 1-μF ceramic capacitor from VREF to the GND pin close to the IC. This voltage could be used for programming of voltage and current regulation and for programming the TS threshold.