SFFS276A September   2021  – January 2023 XTR111

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 HVSSOP Package
    2. 2.2 VSON Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 HVSSOP Package
    2. 4.2 VSON Package
  6. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the XTR111 (HVSSOP and VSON packages). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Short circuit to Supply means short to VSP.
  • Short circuit to Ground means short to GND.
  • The OD pin is driven by an external control signal. When the signal is low, the device output is enabled, and when the signal is high, the device output is disabled. Thus, although not a functional requirement for the device, the Output Disable function is variable (can be toggled) rather than fixed.
  • The EF pin is monitored by external circuitry for use elsewhere in the system (not a functional requirement for the device).
  • REGF is used to power other circuitry in the system, and is configured to a voltage other than 3 V through the use of a voltage divider, as shown in Figure 45b of the XTR111 data sheet (not a functional requirement for the device).