SBVA088 August   2022 TPS746-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 DRV Package
    2. 2.2 DRB Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 DRV Package
    2. 4.2 DRB Package

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the TPS746-Q1 (DRV and DRB packages). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality.
B No device damage, but loss of functionality.
C No device damage, but performance degradation.
D No device damage, no impact to functionality or performance.