SNOSD57 June   2017 LF298-MIL

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 TTL and CMOS 3 V ≤ VLOGIC (Hi State) ≤ 7 V
    2. 7.2 CMOS 7 V ≤ VLOGIC (Hi State) ≤ 15 V
    3. 7.3 Operational Amplifier Drive
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Hold Capacitor
      2. 9.1.2 DC and AC Zeroing
      3. 9.1.3 Logic Rise Time
      4. 9.1.4 Sampling Dynamic Signals
      5. 9.1.5 Digital Feedthrough
    2. 9.2 Typical Applications
      1. 9.2.1  X1000 Sample and Hold
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2  Sample and Difference Circuit
      3. 9.2.3  Ramp Generator With Variable Reset Level
      4. 9.2.4  Integrator With Programmable Reset Level
      5. 9.2.5  Output Holds at Average of Sampled Input
      6. 9.2.6  Increased Slew Current
      7. 9.2.7  Reset Stabilized Amplifier
      8. 9.2.8  Fast Acquisition, Low Droop Sample and Hold
      9. 9.2.9  Synchronous Correlator for Recovering Signals Below Noise Level
      10. 9.2.10 2-Channel Switch
      11. 9.2.11 DC and AC Zeroing
      12. 9.2.12 Staircase Generator
      13. 9.2.13 Differential Hold
      14. 9.2.14 Capacitor Hysteresis Compensation
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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1 Features

  • Operates from ±5-V to ±18-V Supplies
  • Less than 10-μs Acquisition Time
  • Logic Input Compatible With TTL, PMOS, CMOS
  • 0.5-mV Typical Hold Step at Ch = 0.01 µF
  • Low Input Offset
  • 0.002% Gain Accuracy
  • Low Output Noise in Hold Mode
  • Input Characteristics Do Not Change During Hold Mode
  • High Supply Rejection Ratio in Sample or Hold
  • Wide Bandwidth
  • Space Qualified, JM38510

2 Applications

  • Ramp Generators With Variable Reset Level
  • Integrators With Programmable Reset Level
  • Synchronous Correlators
  • 2-Channel Switches
  • DC and AC Zeroing
  • Staircase Generators

3 Description

The LF298-MIL devices are monolithic sample-and-hold circuits that use BI-FET technology to obtain ultrahigh DC accuracy with fast acquisition of signal and low droop rate. Operating as a unity-gain follower, DC gain accuracy is 0.002% typical and acquisition time is as low as 6 µs to 0.01%. A bipolar input stage is used to achieve low offset voltage and wide bandwidth. Input offset adjust is accomplished with a single pin and does not degrade input offset drift. The wide bandwidth allows the LF298-MIL to be included inside the feedback loop of 1-MHz operational amplifiers without having stability problems. Input impedance of 1010 Ω allows high-source impedances to be used without degrading accuracy.

P-channel junction FETs are combined with bipolar devices in the output amplifier to give droop rates as low as 5 mV/min with a 1-µF hold capacitor. The JFETs have much lower noise than MOS devices used in previous designs and do not exhibit high temperature instabilities. The overall design ensures no feedthrough from input to output in the hold mode, even for input signals equal to the supply voltages.

Logic inputs on the LF298-MIL are fully differential with low input current, allowing for direct connection to TTL, PMOS, and CMOS. Differential threshold is
1.4 V. The LF298-MIL will operate from ±5-V to ±18-V supplies.

An A version is available with tightened electrical specifications.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LF298-MIL SOIC (14) 8.65 mm × 3.91 mm
TO-99 (8) 9.08 mm × 9.08 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Connection

LF298-MIL typ_connection_snosbi3.gif

Acquisition Time

LF298-MIL acquisition_time_snosbi3_a.gif