LF298-MIL
- Operates from ±5-V to ±18-V Supplies
- Less than 10-µs Acquisition Time
- Logic Input Compatible With TTL, PMOS, CMOS
- 0.5-mV Typical Hold Step at Ch = 0.01 µF
- Low Input Offset
- 0.002% Gain Accuracy
- Low Output Noise in Hold Mode
- Input Characteristics Do Not Change During Hold Mode
- High Supply Rejection Ratio in Sample or Hold
- Wide Bandwidth
- Space Qualified, JM38510
The LF298-MIL devices are monolithic sample-and-hold circuits that use BI-FET technology to obtain ultrahigh DC accuracy with fast acquisition of signal and low droop rate. Operating as a unity-gain follower, DC gain accuracy is 0.002% typical and acquisition time is as low as 6 µs to 0.01%. A bipolar input stage is used to achieve low offset voltage and wide bandwidth. Input offset adjust is accomplished with a single pin and does not degrade input offset drift. The wide bandwidth allows the LF298-MIL to be included inside the feedback loop of 1-MHz operational amplifiers without having stability problems. Input impedance of 1010 Ω allows high-source impedances to be used without degrading accuracy.
P-channel junction FETs are combined with bipolar devices in the output amplifier to give droop rates as low as 5 mV/min with a 1-µF hold capacitor. The JFETs have much lower noise than MOS devices used in previous designs and do not exhibit high temperature instabilities. The overall design ensures no feedthrough from input to output in the hold mode, even for input signals equal to the supply voltages.
Logic inputs on the LF298-MIL are fully differential with low input current, allowing for direct connection to TTL, PMOS, and CMOS. Differential threshold is
1.4 V. The LF298-MIL will operate from ±5-V to ±18-V supplies.
An A version is available with tightened electrical specifications.
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | LF298-MIL Monolithic Sample-and-Hold Circuits 数据表 | PDF | HTML | 2017年 6月 21日 |
设计和开发
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封装 | 引脚 | 下载 |
---|---|---|
TO-CAN (LMC) | 8 | 查看选项 |
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