SLUS822C June   2008  – August 2016 UCC27200-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Stages
        1. 7.3.1.1 Undervoltage Lockout (UVLO)
        2. 7.3.1.2 Level Shift
        3. 7.3.1.3 Boot Diode
        4. 7.3.1.4 Output Stages
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Switching the MOSFETs
      2. 8.1.2 Dynamic Switching of the MOSFETs
      3. 8.1.3 Delay Matching and Narrow Pulse Widths
      4. 8.1.4 Boot-Diode Performance
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Threshold Type
        2. 8.2.2.2 VDD Bias Supply Voltage
        3. 8.2.2.3 Peak Source and Sink Currents
        4. 8.2.2.4 Propagation Delay
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resource
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted)(1)(2)
MIN MAX UNIT
VDD Supply voltage –0.3 20 V
VLI, VHI Input voltages on LI and HI –0.3 20 V
VLO Output voltage on LO DC –0.3 VDD + 0.3 V
Repetitive pulse < 100 ns –2 VDD + 0.3 V
VHO Output voltage on HO DC VHS – 0.3 VHB + 0.3 V
Repetitive pulse < 100 ns VHS – 2 VHB + 0.3,
(VHB – VHS < 20)
V
VHS HS voltage DC –1 120 V
Repetitive pulse < 100 ns –5 120 V
VHB HB voltage –0.3 120 V
HB-HS voltage –0.3 20 V
Tlead Lead temperature Soldering, 10 seconds 300 °C
PD Power dissipation TA = 25°C(3) 2.7 W
TJ Operating virtual-junction temperature –40 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to VSS. Currents are positive into, negative out of the specified terminal.
(3) This data was taken using the JEDEC proposed high-K test PCB (see Thermal Information for details).

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 ±1000
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VDD Supply voltage 8 12 17 V
VHS HS voltage –1 105 V
HS voltage (repetitive pulse <100 ns) –5 110
VHB HB voltage VHS + 8 VHS + 17 V
VDD – 1 115
Voltage slew rate on HS 50 V/ns
TJ Operating junction temperature –40 140 °C
TA Operating ambient temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) UCC2720x-Q1 UNIT
DDA (SO)
8 PINS
RθJA Junction-to-ambient thermal resistance 40.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 49.3 °C/W
RθJB Junction-to-board thermal resistance 23.2 °C/W
ψJT Junction-to-top characterization parameter 6.8 °C/W
ψJB Junction-to-board characterization parameter 23.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

over operating free-air temperature range, VDD = VHB = 12 V, VHS = VSS = 0 V, No load on LO or HO,
TJ = –40°C to 140°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENTS
IDD VDD quiescent current VLI = VHI = 0 0.4 0.8 mA
IDDO VDD operating current UCC27200-Q1 f = 500 kHz, CLOAD = 0 2.5 4 mA
UCC27201-Q1 3.8 5.5
IHB Boot voltage quiescent current VLI = VHI = 0 V 0.4 0.8 mA
IHBO Boot voltage operating current f = 500 kHz, CLOAD = 0 2.5 4 mA
IHBS HB to VSS quiescent current VHS = VHB = 110 V 0.0005 1 μA
IHBSO HB to VSS operating current f = 500 kHz, CLOAD = 0 0.1 mA
INPUT
VHIT Input rising threshold UCC27200-Q1 5.8 8 V
VLIT Input falling threshold UCC27200-Q1 3 5.4 V
VIHYS Input voltage hysteresis UCC27200-Q1 0.4 V
VHIT Input voltage threshold UCC27201-Q1 1.7 2.5 V
VLIT Input voltage threshold UCC27201-Q1 0.8 1.6 V
VIHYS Input voltage hysteresis UCC27201-Q1 100 mV
RIN Input pulldown resistance 100 200 350
UNDERVOLTAGE LOCKOUT (UVLO) PROTECTION
VDD rising threshold 6.2 7.1 7.8 V
VDD threshold hysteresis 0.5 V
VHB rising threshold 5.8 6.7 7.2 V
VHB threshold hysteresis 0.4 V
BOOTSTRAP DIODE
VF Low-current forward voltage IVDD – HB = 100 μA 0.65 0.85 V
VFI High-current forward voltage IVDD – HB = 100 mA 0.85 1.1
RD Dynamic resistance, ΔVF/ΔI IVDD – HB = 100 mA and 80 mA 0.6 1 Ω
LO GATE DRIVER
VLOL Low level output voltage ILO = 100 mA 0.18 0.4 V
VLOH High level output voltage ILO = –100 mA,
VLOH = VDD – VLO
TJ = –40°C to 125°C 0.25 0.4 V
TJ = –40°C to 140°C 0.25 0.42
Peak pullup current VLO = 0 V 3 A
Peak pulldown current VLO = 12 V 3 A
HO GATE DRIVER
VHOL Low-level output voltage IHO = 100 mA 0.18 0.4 V
VHOH High-level output voltage IHO = –100 mA,
VHOH = VHB – VHO,
TJ = –40°C  to 125°C 0.25 0.4 V
TJ = –40°C to 140°C 0.25 0.42
Peak pullup current VHO = 0 V 3 A
Peak pulldown current VHO = 12 V 3 A
PROPAGATION DELAYS
TDLFF VLI falling to VLO falling CLOAD = 0 TJ = –40°C to 125°C 20 45 ns
TJ = –40°C to 140°C 20 50
TDHFF VHI falling to VHO falling CLOAD = 0 TJ = –40°C to 125°C 20 45 ns
TJ = –40°C to 140°C 20 50
TDLRR VLI rising to VLO rising CLOAD = 0 TJ = –40°C to 125°C 20 45 ns
TJ = –40°C to 140°C 20 50
TDHRR VHI rising to VHO rising CLOAD = 0 TJ = –40°C to 125°C 20 45 ns
TJ = –40°C to 140°C 20 50
DELAY MATCHING
TMON LI ON, HI OFF 1 7 ns
TMOFF LI OFF, HI ON 1 7 ns
OUTPUT RISE AND FALL TIME
tR LO, HO CLOAD = 1000 pF 8 ns
tF LO, HO CLOAD = 1000 pF 7 ns
tR LO, HO (3 V to 9 V) CLOAD = 0.1 μF 0.35 0.6 μs
tF LO, HO (3 V to 9 V) CLOAD = 0.1 μF 0.3 0.6 μs
MISCELLANEOUS
Minimum input pulse width that changes the output 50 ns
Bootstrap diode turnoff time IF = 20 mA, IREV = 0.5 A(1)(2) 20 ns
(1) Typical values for TA = 25°C.
(2) IF: Forward current applied to bootstrap diode. IREV: Reverse current applied to bootstrap diode.
UCC27200-Q1 UCC27201-Q1 fig22_lus746.gif Figure 1. Timing Diagrams

6.6 Typical Characteristics

UCC27200-Q1 UCC27201-Q1 wav1_lus746.gif
Figure 2. UCC27200-Q1 Operating Current vs  Frequency
UCC27200-Q1 UCC27201-Q1 wav3_lus746.gif
Figure 4. Boot Voltage Operating Current vs
 Frequency
UCC27200-Q1 UCC27201-Q1 wav5_lus746.gif
Figure 6. UCC27200-Q1 Input Threshold vs
 Supply Voltage
UCC27200-Q1 UCC27201-Q1 wav7_lus746.gif
Figure 8. UCC27200-Q1 Input Threshold vs
Temperature
UCC27200-Q1 UCC27201-Q1 wav9_lus746.gif
Figure 10. LO and HO High-Level Output Voltage
vs  Temperature
UCC27200-Q1 UCC27201-Q1 wav11_lus746.gif
Figure 12. Undervoltage Lockout Threshold
vs  Temperature
UCC27200-Q1 UCC27201-Q1 wav13_lus746.gif
Figure 14. UCC27200-Q1 Propagation Delays vs
Temperature
UCC27200-Q1 UCC27201-Q1 wav15_lus746.gif
Figure 16. UCC27200-Q1 Propagation Delay vs
Supply Voltage
UCC27200-Q1 UCC27201-Q1 wav17_lus746.gif
Figure 18. Delay Matching vs
Temperature
UCC27200-Q1 UCC27201-Q1 wav19_lus746.gif
Figure 20. Diode Current vs
Diode Voltage
UCC27200-Q1 UCC27201-Q1 wav2_lus822.gif
Figure 3. UCC27201-Q1 Operating Current vs  Frequency
UCC27200-Q1 UCC27201-Q1 wav4_lus746.gif
Figure 5. HB to VSS Operating Current vs
Frequency
UCC27200-Q1 UCC27201-Q1 wav6_lus746.gif
Figure 7. UCC27201-Q1 Input Threshold vs
 Supply Voltage
UCC27200-Q1 UCC27201-Q1 wav8_lus746.gif
Figure 9. UCC27201-Q1 Input Threshold vs  
Temperature
UCC27200-Q1 UCC27201-Q1 wav10_lus746.gif
Figure 11. LO and HO Low-Level Output Voltage
vs  Temperature
UCC27200-Q1 UCC27201-Q1 wav12_lus746.gif
Figure 13. Undervoltage Lockout Threshold Hysteresis
vs  Temperature
UCC27200-Q1 UCC27201-Q1 wav14_lus746.gif
Figure 15. UCC27201-Q1 Propagation Delays vs
Temperature
UCC27200-Q1 UCC27201-Q1 wav16_lus746.gif
Figure 17. UCC27201-Q1 Propagation Delay vs
Supply Voltage
UCC27200-Q1 UCC27201-Q1 wav18_lus746.gif
Figure 19. Output Current vs
Output Voltage
UCC27200-Q1 UCC27201-Q1 wav20_lus746.gif
Figure 21. Quiescent Current vs
Supply Voltage