ZHCSGH5D
August 2017 – May 2019
TUSB1042I
PRODUCTION DATA.
1
特性
2
应用
3
说明
Device Images
简化电路原理图
TUSB1042I 眼图
4
修订历史记录
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Supply Characteristics
6.6
DC Electrical Characteristics
6.7
AC Electrical Characteristics
6.8
DCI Specific Electrical Characteristics
6.9
Timing Requirements
6.10
Switching Characteristics
6.11
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
USB 3.1
8.3.2
4-level Inputs
8.3.3
Receiver Linear Equalization
8.4
Device Functional Modes
8.4.1
Device Configuration in GPIO Mode
8.4.2
Device Configuration In I2C Mode
8.4.3
Linear EQ Configuration
8.4.4
USB3.1 Modes
8.4.5
Operation Timing – Power Up
8.5
Programming
8.6
Register Maps
8.6.1
General Register (address = 0x0A) [reset = 00000001]
Table 9.
General Registers
8.6.2
USB3.1 Control/Status Registers (address = 0x20) [reset = 00000000]
Table 10.
USB3.1 Control/Status Registers (0x20)
8.6.3
USB3.1 Control/Status Registers (address = 0x21) [reset = 00000000]
Table 11.
USB3.1 Control/Status Registers (0x21)
8.6.4
USB3.1 Control/Status Registers (address = 0x22) [reset = 00000100]
Table 12.
USB3.1 Control/Status Registers (0x22)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
9.3
System Examples
9.3.1
USB 3.1
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
器件和文档支持
12.1
相关链接
12.2
接收文档更新通知
12.3
社区资源
12.4
商标
12.5
静电放电警告
12.6
Glossary
13
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
RNQ|40
MPQF457A
散热焊盘机械数据 (封装 | 引脚)
订购信息
zhcsgh5d_oa
zhcsgh5d_pm
6.11
Typical Characteristics
Figure 1.
USB RX EQ Settings Curves
Figure 3.
USB TX Linearity Curves at 5 GHz
Figure 5.
Input Return Loss Performance
Figure 7.
USB 3.1 Gen1 Eye-Pattern Performance with 12-inch Input PCB Trace at 5 Gbps
Figure 2.
USB TX EQ Settings Curves
Figure 4.
USB RX Linearity Curves at 5 GHz
Figure 6.
Output Return Loss Performance
Figure 8.
USB 3.1 Gen2 Eye-Pattern Performance with
12-inch Input PCB Trace at 10 Gbps