ZHCSHL5C February   2018  – September 2019 TS3USBCA4

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      简化原理图
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics (3 V ≤ VCC ≤ 3.6 V)
    6. 6.6  Electrical Characteristics (2.4 V ≤ VCC ≤ 5.5 V)
    7. 6.7  Switching Characteristics (2.4 V ≤ VCC ≤ 5.5 V)
    8. 6.8  Timing Requirements (3 V ≤ VCC ≤ 3.6 V)
    9. 6.9  Timing Requirements (2.4 V ≤ VCC ≤ 5.5 V)
    10. 6.10 Timing Diagrams
    11. 6.11 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Audio Path
      2. 8.3.2 High-Speed Paths
      3. 8.3.3 3-level Input
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
    6. 8.6 Register Maps
      1. 8.6.1 TS3USBCA4 Registers
        1. 8.6.1.1 Revision_ID Register (Offset = 9h) [reset = 0h]
          1. Table 8. Revision_ID Register Field Descriptions
        2. 8.6.1.2 General_1 Register (Offset = Ah) [reset = 0h]
          1. Table 9. General_1 Register Field Descriptions
        3. 8.6.1.3 General_2 Register (Offset = Bh) [reset = 0h]
          1. Table 10. General_2 Register Field Descriptions
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 接收文档更新通知
    2. 12.2 支持资源
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Switching Characteristics (2.4 V ≤ VCC ≤ 5.5 V)

All minimum/maximum specifications are at TA = -40/85°C, VCC = 2.4 V/5.5 V, unless otherwise noted. Typical specifications are at TA = 25°C, VCC = 3.3 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I2C
fSCL I2C clock frequency 400 kHz
tBUF Bus free time between START and STOP conditions 1.3 µs
tHDSTA Hold time after repeated START condition. After this period, the first clock pulse is generated 0.6 µs
tLOW Low period of the I2C clock 1.3 µs
tHIGH High period of the I2C clock 0.6 µs
tSUSTA Setup time for a repeated START condition 0.6 µs
tHDDAT Data hold time 0 µs
tSUDAT Data setup time 150 ns
tR Rise time of both SDA and SCL signals 300 ns
tF Fall time of both SDA and SCL signals 20 × (VI2C/5.5 V) 300 ns
tSUSTO Setup time for STOP condition 0.6 µs