SCDS256A October   2009  – September 2016 TS3USB31E

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Dynamic Electrical Characteristics
    7. 6.7 Switching Characteristics
  7. Application Information
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 IOFF Supports Partial Power-Down Mode Operation
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resource
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage –0.5 7 V
VIN Control input voltage(2)(3) –0.5 7 V
VI/O Switch I/O voltage (2)(3)(4) HSD+, HSD– –0.5 VCC + 0.3 V
D+, D– when VCC > 0 –0.5 VCC + 0.3
D+, D– when VCC = 0 5.25
IIK Control input clamp current VIN < 0 –50 mA
II/OK I/O port clamp current VI/O < 0 –50 mA
II/O ON-state switch current(5) ±64 mA
Continuous current through VCC or GND ±100 mA
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground, unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) VI and VO are used to denote specific conditions for VI/O.
(5) II and IO are used to denote specific conditions for II/O.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±8000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage 2.25 4.3 V
VIH High-level control input voltage VCC = 2.3 V to 2.7 V 0.9 V
VCC = 3 V to 3.6 V 1.3
VCC = 4.3 V 1.7
VIL Low-level control input voltage VCC = 2.3 V to 2.7 V 0.4 V
VCC = 3 V to 3.6 V 0.5
VCC = 4.3 V 0.7
VI/O Data input-output voltage 0 VCC V
TA Operating free-air temperature –40 85 °C
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs.

6.4 Thermal Information

THERMAL METRIC(1) TS3USB31 UNIT
RSE (UQFN)
8 PINS
RθJA Junction-to-ambient thermal resistance 127.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 70.4 °C/W
RθJB Junction-to-board thermal resistance 35 °C/W
ψJT Junction-to-top characterization parameter 2.9 °C/W
ψJB Junction-to-board characterization parameter 34.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT
VIK Input Clamp Voltage VCC = 3 V, II = –18 mA –1.2 V
IIN Control inputs VCC = 4.3 V or 0 V, VIN = 0 to 4.3 V ±1 µA
IOZ(3) VCC = 4.3 V, VO = 0 to 3.6 V, VI = 0, switch OFF ±1 µA
IOFF D+ and D– VCC = 0 V, VO = 0 V to 4.3 V, VI = 0, VIN = VCC or GND ±2 µA
ICC VCC = 4.3 V, II/O = 0, switch ON or OFF 1 µA
ΔICC(4) Control inputs VCC = 4.3 V, VIN = 2.6 V 10 µA
Cin Control inputs VCC = 0 V, VIN = VCC or GND 1 pF
Cio(OFF) Off-state input-output capacitance VCC = 2.5 V, VI/O = 2.5 V or 0, switch OFF 2 pF
VCC = 3.3 V, VI/O = 3.3 V or 0, switch OFF 2
Cio(ON) On-state input-output capacitance VCC = 2.5 V, VI/O = 2.5 V or 0, switch ON 6 pF
VCC = 3.3 V, VI/O = 3.3 V or 0, switch ON 6
ron(5) On-state resistance VCC = 2.5 V, VI = 0.4 V, IO = –8 mA 7.5 9 Ω
VCC = 3 V, VI = 0.4 V, IO = –8 mA 6.5 10
Δron Channel match VCC = 2.5 V, VI = 0.4 V, IO = –8 mA 0.4 Ω
VCC = 3 V, VI = 0.4 V, IO = –8 mA 0.35
ron(flat) On-state resistance flatness VCC = 2.5 V, VI = 0 V or 1 V, IO = –8 mA 0.07 Ω
VCC = 3 V, VI = 0 V or 1 V, IO = –8 mA 2
(1) VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins.
(2) All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C.
(3) For I/O ports, the parameter IOZ includes the input leakage current.
(4) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
(5) Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals.

6.6 Dynamic Electrical Characteristics

over operating range, TA = –40°C to +85°C, GND = 0 V
PARAMETER TEST CONDITIONS TYP(1) UNIT
VCC = 2.5 V ± 10%
XTALK Crosstalk RL = 50 Ω, f = 240 MHz, See Figure 6 –53 dB
OIRR OFF isolation RL = 50 Ω, f = 240 MHz, See Figure 5 –30 dB
BW Bandwidth (–3 dB) RL = 50 Ω, CL = 5 pF, See Figure 7 1100 MHz
VCC = 3.3 V ± 10%
XTALK Crosstalk RL = 50 Ω, f = 240 MHz, See Figure 6 –53 dB
OIRR OFF isolation RL = 50 Ω, f = 240 MHz, See Figure 5 –30 dB
BW Bandwidth (–3 dB) RL = 50 Ω, CL = 5 pF, See Figure 7 1100 MHz
(1) For Max or Min conditions, use the appropriate value specified under Electrical Characteristics for the applicable device type.

6.7 Switching Characteristics

over operating range, TA = –40°C to 85°C, GND = 0 V
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VCC = 2.5 V ± 10%
tpd Propagation delay(2)(3) RL = 50 Ω, CL = 5 pF,
See Figure 8
0.25 ns
tON Line enable time, OE to D, nD RL = 50 Ω, CL = 5 pF,
See Figure 4
30 ns
tOFF Line disable time, OE to D, nD RL = 50 Ω, CL = 5 pF,
See Figure 4
25 ns
tSK(O) Output skew between centre port to any other port(2) RL = 50 Ω, CL = 5 pF,
See Figure 9
50 ps
tSK(P) Skew between opposite transitions of the same output
(tPHL  – tPLH)(2)
RL = 50 Ω, CL = 5 pF,
See Figure 9
20 ps
tJ Total jitter(2) RL = 50 Ω, CL = 5 pF,
tR = tF = 500 ps at 480 Mbps
(PRBS = 215 – 1)
200 ps
VCC = 3.3 V ± 10%
tpd Propagation delay(2)(3) RL = 50 Ω, CL = 5 pF,
See Figure 8
0.25 ns
tON Line enable time, OE to D, nD RL = 50 Ω, CL = 5 pF,
See Figure 4
30 ns
tOFF Line disable time, OE to D, nD RL = 50 Ω, CL = 5 pF,
See Figure 4
25 ns
tSK(O) Output skew between centre port to any other port(2) RL = 50 Ω, CL = 5 pF,
See Figure 9
50 ps
tSK(P) Skew between opposite transitions of the same output
(tPHL  – tPLH)(2)
RL = 50 Ω, CL = 5 pF,
See Figure 9
20 ps
tJ Total jitter(2) RL = 50 Ω, CL = 5 pF,
tR = tF = 500 ps at 480 Mbps
(PRBS = 215 – 1)
200 ps
(1) For Max or Min conditions, use the appropriate value specified under Electrical Characteristics for the applicable device type.
(2) Specified by design
(3) The bus switch contributes no propagational delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25 ns for 10-pF load. Since this time constant is much smaller than the rise and fall times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side.