ZHCSLO0B April   2023  – October 2023 TPS62874-Q1 , TPS62875-Q1 , TPS62876-Q1 , TPS62877-Q1

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6.   Device Options
  7. Pin Configuration and Functions
  8. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings - Q100
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Characteristics
    7. 6.7 Typical Characteristics
  9. Parameter Measurement Information
  10. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed-Frequency DCS-Control Topology
      2. 8.3.2  Forced-PWM and Power-Save Modes
      3. 8.3.3  Transient Non-Synchronous Mode (optional)
      4. 8.3.4  Precise Enable
      5. 8.3.5  Start-Up
      6. 8.3.6  Switching Frequency Selection
      7. 8.3.7  Output Voltage Setting
        1. 8.3.7.1 Output Voltage Range
        2. 8.3.7.2 Output Voltage Setpoint
        3. 8.3.7.3 Non-Default Output Voltage Setpoint
        4. 8.3.7.4 Dynamic Voltage Scaling
        5. 8.3.7.5 Droop Compensation
      8. 8.3.8  Compensation (COMP)
      9. 8.3.9  Mode Selection / Clock Synchronization (MODE/SYNC)
      10. 8.3.10 Spread Spectrum Clocking (SSC)
      11. 8.3.11 Output Discharge
      12. 8.3.12 Undervoltage Lockout (UVLO)
      13. 8.3.13 Overvoltage Lockout (OVLO)
      14. 8.3.14 Overcurrent Protection
        1. 8.3.14.1 Cycle-by-Cycle Current Limiting
        2. 8.3.14.2 Hiccup Mode
        3. 8.3.14.3 Current-Limit Mode
      15. 8.3.15 Power Good (PG)
        1. 8.3.15.1 Standalone / Primary Device Behavior
        2. 8.3.15.2 Secondary Device Behavior
      16. 8.3.16 Remote Sense
      17. 8.3.17 Thermal Warning and Shutdown
      18. 8.3.18 Stacked Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
      2. 8.4.2 Undervoltage Lockout
      3. 8.4.3 Standby
      4. 8.4.4 On
    5. 8.5 Programming
      1. 8.5.1 Serial Interface Description
      2. 8.5.2 Standard-, Fast-, Fast-Mode Plus Protocol
      3. 8.5.3 HS-Mode Protocol
      4. 8.5.4 I2C Update Sequence
      5. 8.5.5 I2C Register Reset
      6. 8.5.6 Dynamic Voltage Scaling (DVS)
    6. 8.6 Device Registers
  11. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Selecting the Input Capacitors
        3. 9.2.2.3 Selecting the Compensation Resistor
        4. 9.2.2.4 Selecting the Output Capacitors
        5. 9.2.2.5 Selecting the Compensation Capacitor CC
        6. 9.2.2.6 Selecting the Compensation Capacitor CC2
      3. 9.2.3 Application Curves
    3. 9.3 Application Using Two TPS62876-Q1 in a Stacked Configuration
      1. 9.3.1 Design Requirements For Two Stacked Devices
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Selecting the Compensation Resistor
        2. 9.3.2.2 Selecting the Output Capacitors
        3. 9.3.2.3 Selecting the Compensation Capacitor CC
      3. 9.3.3 Application Curves for Two Stacked Devices
    4. 9.4 Application Using Three TPS62876-Q1 in a Stacked Configuration
      1. 9.4.1 Design Requirements For Three Stacked Devices
      2. 9.4.2 Detailed Design Procedure
        1. 9.4.2.1 Selecting the Compensation Resistor
        2. 9.4.2.2 Selecting the Output Capacitors
        3. 9.4.2.3 Selecting the Compensation Capacitor CC
      3. 9.4.3 Application Curves for Three Stacked Devices
    5. 9.5 Best Design Practices
    6. 9.6 Power Supply Recommendations
    7. 9.7 Layout
      1. 9.7.1 Layout Guidelines
      2. 9.7.2 Layout Example
  12. 10Device and Documentation Support
    1. 10.1 接收文档更新通知
    2. 10.2 支持资源
    3. 10.3 Trademarks
    4. 10.4 静电放电警告
    5. 10.5 术语表
  13. 11Mechanical, Packaging, and Orderable Information

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Selecting the Input Capacitors

As with all buck converters, the input current of the TPS6287x-Q1 devices is discontinuous. The input capacitors provide a low-impedance energy source for the device, and their value, type, and location are critical for correct operation. TI recommends low-ESR multilayer ceramic capacitors for best performance. In practice, the total input capacitance typically comprises a combination of different capacitors, in which larger capacitors provide the decoupling at lower frequencies and smaller capacitors provide the decoupling at higher frequencies.

The TPS6287x-Q1 devices feature a butterfly layout with two VIN pin pairs on opposite sides of the package. This allows the input capacitors to be placed symmetrically on the PCB such that the electromagnetic fields generated cancel each other out, thereby reducing EMI.

The duty cycle of the converter is given by:

Equation 8. D = V O U T η × V I N

where:

  • VIN is the input voltage
  • VOUT is the output voltage
  • η is the efficiency

Equation 9. D = 0.75 0.9 × 3.3 = 0.253

The value of input capacitance needed to meet the input voltage ripple requirements is given by:

Equation 10. C I N = D × ( 1 - D ) × I O U T V I N ( P P ) × f s w

where:

  • D is the duty cycle
  • fsw is the switching frequency
  • VIN(PP) is the input voltage ripple

  • IOUT is the output current

Equation 11. C I N = 0.253 × 1 - 0.253 × 11.3 0.1 × 2.25 × 10 6 F = 9.5   μ F

The value of CIN calculated with Equation 10 is the effective capacitance after all derating, tolerance, and ageing effects have been considered. We recommend multilayer ceramic capacitors with an X7R dielectric (or similar) for CIN, and these capacitors must be placed as close to the VIN and GND pins as possible, so as to minimize the loop area.

Table 9-3 lists a number of capacitors suitable for this application. This list is not exhaustive, however, and other capacitors from other manufacturers may also be suitable.
Table 9-3 List of Recommended Input Capacitors
CAPACITANCE DIMENSIONS VOLTAGE RATING MANUFACTURER, PART NUMBER
mm (inch)
470 nF ±10% 1005 (0402) 10 V Murata, GCM155C71A474KE36D
470 nF ±10% 1005 (0402) 10 V TDK, CGA2B3X7S1A474K050BB
10 μF ±10% 2012 (0805) 10 V Murata, GCM21BR71A106KE22L
10 μF ±10% 2012 (0805) 10 V TDK, CGA4J3X7S1A106K125AB
22 μF ±10% 3216 (1206) 10 V Murata, GCM31CR71A226KE02L
22 μF ±20% 3216 (1206) 10 V TDK, CGA5L1X7S1A226M160AC