ZHCSQ77A February   2023  – September 2023 TPS25948

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Electrical Characteristics
    5. 7.5 Timing Requirements
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO and UVP)
      2. 8.3.2 Overvoltage Lockout (OVLO)
      3. 8.3.3 Inrush Current, Overcurrent, and Short Circuit Protection
        1. 8.3.3.1 Slew Rate (dVdt) and Inrush Current Control
        2. 8.3.3.2 Active Current Limiting
        3. 8.3.3.3 Short-Circuit Protection
      4. 8.3.4 Analog Load Current Monitor
      5. 8.3.5 Reverse Current Protection
      6. 8.3.6 Overtemperature Protection (OTP)
      7. 8.3.7 Fault Response and Indication (FLT)
      8. 8.3.8 Supply Good Indication (SPLYGD/SPLYGD)
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Single Device, Self-Controlled
    3. 9.3 Typical Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Setting Overvoltage Threshold
        2. 9.3.2.2 Setting Output Voltage Rise Time (tR)
        3. 9.3.2.3 Setting Overcurrent Threshold (ILIM)
        4. 9.3.2.4 Setting Overcurrent Blanking Interval (tITIMER)
      3. 9.3.3 Application Curves
    4. 9.4 Active ORing
    5. 9.5 Priority Power MUXing
    6. 9.6 Parallel Operation
    7. 9.7 USB PD Port Protection
    8. 9.8 Power Supply Recommendations
      1. 9.8.1 Transient Protection
      2. 9.8.2 Output Short-Circuit Measurements
    9. 9.9 Layout
      1. 9.9.1 Layout Guidelines
      2. 9.9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 接收文档更新通知
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 静电放电警告
    6. 10.6 术语表
  12. 11Mechanical, Packaging, and Orderable Information

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Active ORing

A typical redundant power supply configuration is shown in Figure 9-34 below. Schottky ORing diodes have been popular for connecting parallel power supplies, such as parallel operation of wall adapter with a battery or a hold-up storage capacitor. The disadvantage of using ORing diodes is high voltage drop and associated power loss. The TPS25948xx with integrated, low-ohmic, back-to-back FETs provide a simple and efficient solution. Figure 9-34 below shows the Active ORing implementation using TPS249480x devices.

GUID-20230214-SS0I-GC2K-ZDGP-NWBWZNJTRNMD-low.svgFigure 9-11 Two Devices, Active ORing Configuration

The linear ORing mechanism in TPS25948xx ensures that there's no reverse current flowing from one power source to the other during fast or slow ramp of either supply.

The following waveform illustrates the active ORing behavior when the supply rails are being ramped up sequentially.

GUID-20230216-SS0I-NMJ1-0RBZ-9JMKMVMMJJMH-low.svgFigure 9-12 Active ORing Response
GUID-20230216-SS0I-J2ZF-R5VN-42HKNCXZRKF6-low.svgFigure 9-13 Active ORing Response

When the bus voltages (IN1 and IN2) are matched, device in each path sees a forward voltage drop and is ON delivering the load current. During this period, current is shared between the rails in the ratio of differential voltage drop across each device.

In addition to supply ORing, the devices protect the system from overvoltage, excessive inrush current, overload and short-circuit faults at all times.

Note: ORing can be done either between two similar rails or between dissimilar rails. For ORing cases with skewed voltage combinations, the dVdt pin capacitor rating should be chosen based on the highest of the 2 supplies. Refer to Recommended Operating Conditions table for more details.