SLVSC42A August   2013  – April 2015 TPS22967

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Typical Application Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VBIAS = 5 V
    6. 7.6 Electrical Characteristics: VBIAS = 2.5 V
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
      1. 7.8.1 Typical AC Scope Captures at TA = 25ºC, CT = 1 nF
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 ON/OFF Control
      2. 8.3.2 Adjustable Rise Time
      3. 8.3.3 Quick Output Discharge
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Capacitor (Optional)
      2. 9.1.2 Output Capacitor (Optional)
      3. 9.1.3 VIN and VBIAS Voltage Range
      4. 9.1.4 Safe Operating Area (SOA)
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inrush Current
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

This section describes design considerations for the TPS22967 which can vary depending on the specific application.

9.1.1 Input Capacitor (Optional)

To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a discharged load capacitor or short circuit, a capacitor must be placed between VIN and GND. A 1-µF ceramic capacitor, CIN, placed close to the pins, is usually sufficient. Higher values of CIN can be used to further reduce the voltage drop during high-current applications. When switching heavy loads, TI recommends having an input capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.

9.1.2 Output Capacitor (Optional)

Because of the integrated body diode in the NMOS switch, a CIN greater than CL is highly recommended. A CL greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current flow through the body diode from VOUT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN dip caused by inrush currents during start-up; however, a 10-to-1 ratio for capacitance is not required for proper functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause slightly more VIN dip upon turnon due to inrush currents. This can be mitigated by increasing the capacitance on the CT pin for a longer rise time (see below).

9.1.3 VIN and VBIAS Voltage Range

For optimal RON performance, make sure VIN ≤ VBIAS. The device will still be functional if VIN > VBIAS but it will exhibit RON greater than what is listed in the Electrical Characteristics: VBIAS = 5 V table. See Figure 31 for an example of a typical device. Notice the increasing RON as VIN exceeds VBIAS voltage. Never exceed the maximum voltage rating for VIN and VBIAS.

TPS22967 G022_lvsc42.pngFigure 31. RON vs VIN (VIN > VBIAS)

9.1.4 Safe Operating Area (SOA)

The SOA curves show the continuous current carrying capability of the device versus ambient temperature (TA) to ensure reliable operation over 70,000 hours of device lifetime. The different curves represent the percentage On time over device lifetime and can be used as a reference to understand the current carrying capability of TPS22967 under different use cases. TI recommends maintaining continuous current at or below the SOA curves shown in Figure 32.

TPS22967 SOA_vs_Temp_lvsc42.png
On time is the duration of time that the device is enabled (ON ≥ VIH) over 70,000 hour lifetime.
Figure 32. Safe Operating Area

9.2 Typical Application

TPS22967 typ_app_lvsc42.gifFigure 33. Typical Application Schematic

9.2.1 Design Requirements

For this design example, use the parameters listed in Table 3 as the input parameters.

Table 3. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
VIN 3.3 V
VBIAS 5 V
CL 22 μF
Maximum Acceptable Inrush Current 400 mA

9.2.2 Detailed Design Procedure

9.2.2.1 Inrush Current

When the switch is enabled, the output capacitors must be charged up from 0 V to the set value (3.3 V in this example). This charge arrives in the form of inrush current. Inrush current can be calculated using Equation 2:

Equation 2. Inrush Current = C × dV/dt

where

  • C = output capacitance.
  • dV = output voltage.
  • dt = rise time.

The TPS22967 offers adjustable rise time for VOUT. This feature lets the user control the inrush current during turnon. The appropriate rise time can be calculated using the design requirements and the inrush current equation.

Equation 3. 400 mA = 22 μ F × 3.3 V/dt
Equation 4. dt = 181.5 μs

To ensure an inrush current of less than 400 mA, choose a CT value that will yield a rise time of more than 181.5 μs. See Application Curves for an example of how the CT capacitor can be used to reduce inrush current.

9.2.3 Application Curves

TPS22967 TPS22965_Inrush1.gif
VBIAS = 5 V VIN = 3.3 V CL = 22 μF
Figure 34. Inrush Current With CT = 0 pF
TPS22967 TPS22965_Inrush2.gif
VBIAS = 5 V VIN = 3.3 V CL = 22 μF
Figure 35. Inrush Current with CT = 220 pF