SLOS488F November   2006  – March 2015 TPA6130A2

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Operating Characteristics
    7. 7.7 Timing Requirements
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Headphone Amplifiers
    4. 8.4 Device Functional Modes
      1. 8.4.1 Hardware Shutdown
      2. 8.4.2 Software Shutdown
      3. 8.4.3 Charge Pump Enabled, HP Amplifiers Disabled
      4. 8.4.4 Hi-Z State
      5. 8.4.5 Stereo Headphone Drive
      6. 8.4.6 Dual Mono Headphone Drive
      7. 8.4.7 Bridge-Tied Load Receiver Drive
      8. 8.4.8 Default Mode
      9. 8.4.9 Volume Control
    5. 8.5 Programming
      1. 8.5.1 General I2C Operation
      2. 8.5.2 Single-and Multiple-Byte Transfers
      3. 8.5.3 Single-Byte Write
      4. 8.5.4 Multiple-Byte Write and Incremental Multiple-Byte Write
      5. 8.5.5 Single-Byte Read
      6. 8.5.6 Multiple-Byte Read
    6. 8.6 Register Maps
      1. 8.6.1 Control Register (Address: 1)
      2. 8.6.2 Volume and Mute Register (Address: 2)
      3. 8.6.3 Output Impedance Register (Address: 3)
      4. 8.6.4 I2C address and Version Register (Address: 4)
      5. 8.6.5 Reserved for test registers (Addresses: 5-8)
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input-Blocking Capacitors
        2. 9.2.2.2 Charge Pump Flying Capacitor and CPVSS Capacitor
        3. 9.2.2.3 Decoupling Capacitors
        4. 9.2.2.4 I2C Control Interface Details
          1. 9.2.2.4.1 Addressing the TPA6130A2
        5. 9.2.2.5 Headphone Amplifiers
      3. 9.2.3 Application Performance Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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1 Features

  • DirectPath™ Ground-Referenced Outputs
    • Eliminates Output DC Blocking Capacitors
    • Reduces Board Area
    • Reduces Component Height and Cost
    • Full Bass Response Without Attenuation
  • Power Supply Voltage Range: 2.5 V to 5.5 V
  • 64 Step Audio Taper Volume Control
  • High Power Supply Rejection Ratio
    (>100 dB PSRR)
  • Differential Inputs for Maximum Noise Rejection (68 dB CMRR)
  • High-Impedance Outputs When Disabled
  • Advanced Pop and Click Suppression Circuitry
  • Digital I2C Bus Control
    • Per Channel Mute and Enable
    • Software Shutdown
    • Multi-Mode Support: Stereo HP, Dual Mono HP, and Single-Channel BTL Operation
    • Amplifier Status
  • Space Saving Packages
    • 20 Pin, 4 mm x 4 mm QFN
    • 16 ball, 2 mm x 2 mm DSBGA
  • ESD Protection of 8 kV HBM and IEC Contact

2 Applications

  • Mobile Phones
  • Portable Media Players
  • Notebook Computers
  • High Fidelity Applications

3 Description

The TPA6130A2 is a stereo DirectPath™ headphone amplifier with I2C digital volume control. The TPA6130A2 has minimal quiescent current consumption, with a typical IDD of 4 mA, making it optimal for portable applications. The I2C control allows maximum flexibility with a 64 step audio taper volume control, channel independent enables and mutes, and the ability to configure the outputs into stereo, dual mono, or a single receiver speaker BTL amplifier that drives 300 mW of power into 16 Ω loads.

The TPA6130A2 is a high fidelity amplifier with an SNR of 98 dB. A PSRR greater than 100 dB enables direct-to-battery connections without compromising the listening experience. The output noise of 9 μVrms (typical A-weighted) provides a minimal noise background during periods of silence. Configurable differential inputs and high CMRR allow for maximum noise rejection in the noisy environment of a mobile device.

TPA6130A2 packaging includes a 2 by 2 mm chip-scale package, and a 4 by 4 mm QFN package.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
TPA6130A2WQFN (20)4.00mm x 4.00mm
DSBGA (16) 2.00mm x 2.00mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

4 Simplified Schematic

TPA6130A2 simappdia35_los488.gif