ZHCSSV5 January   2024 TMP119

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Two-Wire Interface Timing
    8. 6.8 Timing Diagram
    9. 6.9 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Up
      2. 7.3.2 Averaging
      3. 7.3.3 Temperature Result and Limits
      4. 7.3.4 Strain Tolerance
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Conversion Mode
      2. 7.4.2 Shutdown Mode (SD)
      3. 7.4.3 One-Shot Mode (OS)
      4. 7.4.4 Therm and Alert Modes
        1. 7.4.4.1 Alert Mode
        2. 7.4.4.2 Therm Mode
    5. 7.5 Programming
      1. 7.5.1 EEPROM Programming
        1. 7.5.1.1 EEPROM Overview
        2. 7.5.1.2 Programming the EEPROM
      2. 7.5.2 Pointer Register
      3. 7.5.3 I2C and SMBus Interface
        1. 7.5.3.1 Serial Interface
          1. 7.5.3.1.1 Bus Overview
          2. 7.5.3.1.2 Serial Bus Address
          3. 7.5.3.1.3 Writing and Reading Operation
          4. 7.5.3.1.4 Target Mode Operations
            1. 7.5.3.1.4.1 Target Receiver Mode
            2. 7.5.3.1.4.2 Target Transmitter Mode
          5. 7.5.3.1.5 SMBus Alert Function
          6. 7.5.3.1.6 General-Call Reset Function
          7. 7.5.3.1.7 Timeout Function
          8. 7.5.3.1.8 Timing Diagrams
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 C-Code Decoding Temperature Data
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Noise and Averaging
        2. 8.2.2.2 Self-Heating Effect (SHE)
        3. 8.2.2.3 Synchronized Temperature Measurements
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
    5. 8.5 Register Map
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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Bus Overview

The device that initiates the transfer is called a controller, and the devices controlled by the controller are targets. The bus must be controlled by a controller device that generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions.

To address a specific device, a START condition is initiated, indicated by pulling the data line (SDA) from a high- to low-logic level when the SCL pin is high. All targets on the bus shift in the target address byte on the rising edge of the clock, and the last bit indicates whether a read or write operation is intended. During the ninth clock pulse, the addressed target generates an acknowledge and pulls the SDA pin low to respond to the controller.

A data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During the data transfer, the SDA pin must remain stable when the SCL pin is high because any change in the SDA pin when the SCL pin is high is interpreted as a START or STOP signal.

When all data are transferred, the controller generates a repeated START condition or a STOP condition.

  • TMP119 will ignore any I2C traffic until a START condition is observed
  • TMP119 I2C state machine resets every time the device sees a STOP condition
  • For best precision, TI recommends to avoid I2C communication during an active conversion