ZHCSD78 January   2015 TLC2274-HT

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics, VDD = 5 V
    6. 6.6 Operating Characteristics, VDD = 5 V
    7. 6.7 Electrical Characteristics, VDD± = ±5 V
    8. 6.8 Operating Characteristics, VDD± = ±5 V
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Macromodel Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 商标
    2. 11.2 静电放电警告
    3. 11.3 术语表
  12. 12机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VDD+ Supply voltage(2) 8 V
VDD– Supply voltage(2) –8 V
VID Differential input voltage(3) –16 16 V
VI Input voltage(2) Any input VDD– – 0.3 VDD+ V
II Input current Any input –5 5 mA
IO Output current –50 50 mA
Total current into VDD+ –50 50 mA
Total current out of VDD− –50 50 mA
Duration of short-circuit current at (or below) 25°C(4) Unlimited
TA Operating free-air temperature –40 150 °C
Lead temperature 1.6 mm (1/16 inch) from case for 10 s 260 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD–.
(3) Differential voltages are at IN+ with respect to IN–. Excessive current will flow if input is brought below VDD– – 0.3 V.
(4) The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2500 V
Charged-device model (CDM), per AEC Q100-011 All pins ±1500
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VDD± Supply voltage ±2.2 ±8 V
VI Input voltage VDD− VDD+ −1.5 V
VIC Common-mode input voltage VDD− VDD+ −1.5 V
TA Operating free-air temperature −40 150 °C

6.4 Thermal Information

THERMAL METRIC(1) TLC2274 UNIT
PW
14 PINS
RθJA Junction-to-ambient thermal resistance 106.0 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 35.5
RθJB Junction-to-board thermal resistance 47.6
ψJT Junction-to-top characterization parameter 2.4
ψJB Junction-to-board characterization parameter 47.1
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics, VDD = 5 V

at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA(1) MIN TYP MAX UNIT
VIO Input offset voltage VIC = 0 V,
VO = 0 V,		 VDD± = ±2.5 V,
RS = 50 Ω		 25°C 300 2500 μV
Full range 3000
αVIO Temperature coefficient of input offset voltage 25°C to 125°C 2 μV/°C
Input offset voltage long-term drift(2) 25°C 0.002 μV/mo
IIO Input offset current 25°C 0.5 60 pA
Full range 7000
IIB Input bias current 25°C 1 pA
Full range
VICR Common-mode input voltage range RS = 50 Ω |VIO| ≤ 5 mV 25°C 0 to 4 −0.3 to 4.2 V
Full range 0 to 3.5
VOH High-level output voltage IOH = −20 μA 25°C 4.99 V
IOH = −200 μA 25°C 4.85 4.93
Full range 4.84
IOH = −1 mA 25°C 4.25 4.65
Full range 4.20
VOL Low-level output voltage VIC = 2.5 V, IOL = 50 μA 25°C 0.01 V
VIC = 2.5 V, IOL = 500 μA 25°C 0.09 0.15
Full range 0.16
VIC = 2.5 V, IOL = 5 mA 25°C 0.9 1.5
Full range 1.6
AVD Large-signal differential voltage amplification VIC = 2.5 V,
VO = 1 V to 4 V, 		RL = 10 kΩ(3) 25°C 10 35 V/mV
Full range 8
RL = 1 MΩ(3) 25°C 175
rid Differential input resistance 25°C 1012 Ω
ri Common-mode input resistance 25°C 1012 Ω
ci Common-mode input capacitance f = 10 kHz, N package 25°C 8 pF
zo Closed-loop output impedance f = 1 MHz, AV = 10 25°C 140 Ω
CMRR Common-mode rejection ratio VIC = 0 V to 2.7 V,
VO = 2.5 V,		 RS = 50 Ω 25°C 70 75 dB
Full range 69
kSVR Supply voltage rejection ratio (ΔVDD/ΔVIO) VDD = 4.4 V to 16 V, 25°C 80 95 dB
VIC = VDD/2, No load Full range 80
IDD Supply current VO = 2.5 V, No load 25°C 4.4 6 mA
Full range 6
(1) Full range is −40°C to 150°C for thisl part.
(2) Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
(3) Referenced to 2.5 V

6.6 Operating Characteristics, VDD = 5 V

at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA(1) MIN TYP MAX UNIT
SR Slew rate at unity gain VO = 0.5 V to 2.5 V,
CL = 100 pF(2)		 RL = 10 kΩ(2) 25°C 2.3 3.6 V/μs
Full range 1.2
Vn Equivalent input noise voltage f = 10 Hz 25°C 50 nV/√Hz
f = 1 kHz 25°C 9
VN(pp) Peak-to-peak equivalent input noise voltage f = 0.1 to 1 Hz 25°C 1 μV
f = 0.1 to 10 Hz 25°C 1.4
In Equivalent input noise current 25°C 0.6 fA/√Hz
THD + N Total harmonic distortion plus noise VO = 0.5V to 2.5V,
RL = 10 kΩ,
f = 20 kHz (2)		 AV = 1 25°C 0.0013%
AV = 10 0.004%
AV = 100 0.03%
Gain-bandwidth product f = 10 kHz,
CL = 100 pF(2)		 RL = 10 kΩ(2) 25°C 2.18 MHz
BOM Maximum output-swing bandwidth VO(PP) = 2V,
RL = 10 kΩ(2)		 AV = 1,
CL = 100 pF(2)		 25°C 1 MHz
ts Settling time AV = -1,
Step = 0.5V to 2.5V,
RL = 10 kΩ(2)
CL = 100 pF(2)		 To 0.1% 25°C 1.5 μs
To 0.01% 2.6
φm Phase margin at unity gain RL = 10 kΩ CL = 100 pF(2) 25°C 50°
Gain margin 25°C 10 dB
(1) Full range is −40°C to 150°C for this part.
(2) Referenced to 2.5 V

6.7 Electrical Characteristics, VDD± = ±5 V

at specified free-air temperature, VDD± = ±5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA(1) MIN TYP MAX UNIT
VIO Input offset voltage VIC = 0 V,
RS = 50 Ω		 VO = 0 V 25°C 300 2500 μV
Full range 3000
αVIO Temperature coefficient of input offset voltage 25°C to 125°C 2 μV/°C
Input offset voltage long-term drift(2) 25°C 0.002 μV/mo
IIO Input offset current 25°C 0.5 60 pA
Full range 7000
IIB Input bias current 25°C 1 60 pA
Full range 7000
VICR Common-mode input voltage range RS = 50 Ω |VIO| ≤ 5 mV 25°C −5 to 4 −5.3 to 4.2 V
Full range −5 to 3.5
VOM+ Maximum positive peak output voltage IO = −20 μA 25°C 4.99 V
IO = −200 μA 25°C 4.85 4.93
Full range 4.84
IO = −1 mA 25°C 4.25 4.65
Full range 4.20
VOM- Maximum negative peak output voltage VIC = 0 V, IO = 50 μA 25°C −4.99 V
VIC = 0 V, IO = 500 μA 25°C −4.85 −4.91
Full range −4.85
VIC = 0 V, IO = 5 mA 25°C −3.5 −4.1
Full range −3.45
AVD Large-signal differential voltage amplification VO = ±4 V, RL = 10 kΩ 25°C 20 50 V/mV
Full range 16
RL = 1 MΩ 25°C 300
rid Differential input resistance 25°C 1012 Ω
ri Common-mode input resistance 25°C 1012 Ω
ci Common-mode input capacitance f = 10 kHz, N package 25°C 8 pF
zo Closed-loop output impedance f = 1 MHz, AV = 10 25°C 130 Ω
CMRR Common-mode rejection ratio VIC = -5 V to 2.7 V,
VO = 0 V,		 RS = 50 Ω 25°C 75 80 dB
Full range 73
kSVR Supply voltage rejection ratio (ΔVDD/ΔVIO) VDD = ±2.2 V to ±8 V, 25°C 80 95 dB
VIC = 0V, No load Full range 80
IDD Supply current VO = 0 V, No load 25°C 4.4 6 mA
Full range 6
(1) Full range is −40°C to 150°C for this part.
(2) Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

6.8 Operating Characteristics, VDD± = ±5 V

at specified free-air temperature, VDD± = ±5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA(1) MIN TYP MAX UNIT
SR Slew rate at unity gain VO = ±2.3 V,
RL = 10 kΩ		 CL = 100 pF 25°C 2.3 3.6 V/μs
Full range 1.2
Vn Equivalent input noise voltage f = 10 Hz 25°C 50 nV/√Hz
f = 1 kHz 25°C 9
VN(pp) Peak-to-peak equivalent input noise voltage f = 0.1 to 1 Hz 25°C 1 μV
f = 0.1 to 10 Hz 25°C 1.4
In Equivalent input noise current 25°C 0.6 fA/√Hz
THD + N Total harmonic distortion plus noise VO = ±2.3 V,
f = 20 kHz,
RL = 10 kΩ		 AV = 1 25°C 0.0011%
AV = 10 0.004%
AV = 100 0.03%
Gain-bandwidth product f = 10 kHz,
CL = 100 pF		 RL = 10 kΩ 25°C 2.25 MHz
BOM Maximum output-swing bandwidth VO(PP) = 4.6 V,
RL = 10 kΩ		 AV = 1,
CL = 100 pF		 25°C 0.54 MHz
ts Settling time AV = -1,
Step = -2.3 V to 2.3 V,
RL = 10 kΩ
CL = 100 pF		 To 0.1% 25°C 1.5 μs
To 0.01% 3.2
φm Phase margin at unity gain RL = 10 kΩ, CL = 100 pF 25°C 52°
Gain margin 25°C 10 dB
(1) Full range is −40°C to 150°C for this part.
D006_SGLS416.gif
A. See data sheet for Absolute Maximum Ratings and minimum Recommended Operating Conditions.
B. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life).
Figure 2. TLC2274EPWRQ1 Operating Life Derating Chart
D007_SGLS416.gifFigure 3. Estimated Wire Bond Life

6.9 Typical Characteristics

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the devices.
amp_vio_gls404.gif
Figure 4. Distribution of TLC2274 Input Offset Voltage
vio2_vic_gls404.gif
Figure 6. Input Offset Voltage vs Common-Mode Voltage
vi_ta_gls404.gif
Figure 8. Input Voltage vs Free-Air Temperature
vol_iol_gls404.gif
Figure 10. Low-Level Output Voltage vs Low-Level Output Current
vom_io_gls416.gif
TA = 25°C
Figure 12. Maximum Positive Peak Output Voltage vs Output Current
vopp_f_gls404.gif
Figure 14. Maximum Peak-to-Peak Output Voltage vs Frequency
vo_vid_gls404.gif
Figure 16. Output Voltage vs Differential Input Voltage
avd_RL_gls404.gif
Figure 18. Large-Signal Differential Voltage Amplification vs Load Resistance
avd2_f_gls404.gif
Figure 20. Large-Signal Differential Voltage Amplification and Phase Margin vs Frequency
D004_SGLS416.gif
VDD = ±5 V VIC = 2.5 V VO = ±4 V
RL = 10 kΩ
Figure 22. Large-Signal Differential Voltage Amplification vs Free-Air Temperature
zo2_f_gls404.gif
Figure 24. Output Impedance vs Frequency
D005_SGLS416.gif
Figure 26. Common-Mode Rejection Ratio vs Free-Air Temperature
KSVR2_f_gls404.gif
Figure 28. Supply-Voltage Rejection Ratio vs Frequency
SR_CL_gls404.gif
Figure 30. Slew Rate vs Load Capacitance
pulse_t_gls404.gif
Figure 32. Inverting Large-Signal Pulse Response
VF_tim_gls404.gif
Figure 34. Voltage-Follower Large-Signal Pulse Response
vo_tim1_gls404.gif
Figure 36. Inverting Small-Signal Pulse Response
vo_t_gls404.gif
Figure 38. Voltage-Follower Small-Signal Pulse Response
noise_ip_f_gls404.gif
Figure 40. Equivalent Input Noise Voltage vs Frequency
noise_t_gls404.gif
Figure 42. Noise Voltage Over a 10-s Period
THDN_f_gls404.gif
Figure 44. Total Harmonic Distortion Plus Noise vs Frequency
vio_vic_gls404.gif
Figure 5. Input Offset Voltage vs Common-Mode Voltage
vi_vdd_gls404.gif
Figure 7. Input Voltage vs Supply Voltage
voh_ioh_gls416.gif
TA = 25°C
Figure 9. High-Level Output Voltage vs High-Level Output Current
vol2_iol_gls416.gif
TA = 25°C
Figure 11. Low-Level Output Voltage vs Low-Level Output Current
vom2_io_gls416.gif
TA = 25°C
Figure 13. Maximum Negative Peak Output Voltage vs Output Current
ios_vdd_gls404.gif
Figure 15. Short-Circuit Output Current vs Supply Voltage
vo2_vid_gls404.gif
Figure 17. Output Voltage vs Differential Input Voltage
avd_f_gls404.gif
Figure 19. Large-Signal Differential Voltage Amplification and Phase Margin vs Frequency
D003_SGLS416.gif
VDD = 5 V VIC = 2.5 V VO = 1 to 4 V
RL = 10 kΩ
Figure 21. Large-Signal Differential Voltage Amplification vs Free-Air Temperature
zo_f_gls404.gif
Figure 23. Output Impedance vs Frequency
CMRR_f_gls404.gif
Figure 25. Common-Mode Rejection Ratio vs Frequency
KSVR_f_gls404.gif
Figure 27. Supply-Voltage Rejection Ratio vs Frequency
D002_SGLS416.gif
VDD± = ±2.2 to ±8 V VO = 0 V
Figure 29. Supply-Voltage Rejection Ratio vs Free-Air Temperature
D001_SGLS416.gif
VDD = 5 V RL = 10 kΩ CL = 100 pF
AV = 1
Figure 31. Slew Rate vs Free-Air Temperature
inv_t_gls404.gif
Figure 33. Inverting Large-Signal Pulse Response
VF_t_gls404.gif
Figure 35. Voltage-Follower Large-Signal Pulse Response
vo_tim_gls404.gif
Figure 37. Inverting Small-Signal Pulse Response
vo2_t_gls404.gif
Figure 39. Voltage-Follower Small-Signal Pulse Response
vn_f_gls404.gif
Figure 41. Equivalent Input Noise Voltage vs Frequency
noise_f_gls404.gif
Figure 43. Integrated Noise Voltage vs Frequency
gain_vdd_gls404.gif
Figure 45. Gain-Bandwidth Product vs Supply Voltage