ZHCSQI9I December   2003  – March 2024 SN74AVC1T45

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics: VCCA = 1.2V
    7. 5.7  Switching Characteristics: VCCA = 1.5V ± 0.1V
    8. 5.8  Switching Characteristics: VCCA = 1.8V ± 0.15V
    9. 5.9  Switching Characteristics: VCCA = 2.5V ± 0.2V
    10. 5.10 Switching Characteristics: VCCA = 3.3V ± 0.3V
    11. 5.11 Operating Characteristics
    12. 5.12 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Configurable
      2. 7.3.2 Support High-Speed Translation
      3. 7.3.3 Ioff Supports Partial-Power-Down Mode Operation
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Enable Times
    2. 8.2 Typical Applications
      1. 8.2.1 Unidirectional Logic Level-Shifting Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bidirectional Logic Level-Shifting Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-Up Considerations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 静电放电警告
    5. 9.5 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DBV|6
  • DRL|6
  • YZP|6
  • DCK|6
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.2.2 Bidirectional Logic Level-Shifting Application

Figure 8-3 shows the SN74AVC1T45 being used in a bidirectional logic level-shifting application. Because the SN74AVC1T45 does not have an output-enable (OE) pin, the system designer should take precautions to avoid bus contention between SYSTEM-1 and SYSTEM-2 when changing directions.

GUID-6B22F601-4B72-47A0-94FB-3A86D516D054-low.gifFigure 8-3 Bidirectional Logic Level-Shifting Application

The following table provides data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to SYSTEM-1.

Table 8-2 Data Transmission: SYSTEM-1 and SYSTEM-2
STATEDIR CTRLI/O-1I/O-2DESCRIPTION
1HOutInSYSTEM-1 data to SYSTEM-2
2HHi-ZHi-ZSYSTEM-2 is getting ready to send data to SYSTEM-1. I/O-1 and I/O-2 are disabled. The bus-line state depends on pullup or pulldown.(1)
3LHi-ZHi-ZDIR bit is flipped. I/O-1 and I/O-2 still are disabled. The bus-line state depends on pullup or pulldown.(1)
4LInOutSYSTEM-2 data to SYSTEM-1
(1) SYSTEM-1 and SYSTEM-2 must use the same conditions (for example, both pullup or both pulldown).