ZHCSGA5A June   2017  – June 2018 OPA180-Q1 , OPA2180-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
    1.     低噪声 (峰值到峰值噪声 = 250nV)
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions: OPA180-Q1
    2.     Pin Functions: OPA2180-Q1
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: OPA180-Q1
    5. 7.5 Thermal Information: OPA2180-Q1
    6. 7.6 Electrical Characteristics: VS = ±2 V to ±18 V (VS = 4 V to 36 V)
    7. 7.7 Typical Characteristics: Table of Graphs
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Characteristics
      2. 8.3.2 EMI Rejection
      3. 8.3.3 Phase-Reversal Protection
      4. 8.3.4 Capacitive Load and Stability
      5. 8.3.5 Electrical Overstress
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Bipolar ±10-V Analog Output from a Unipolar Voltage Output DAC
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Component Selection
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Discrete INA + Attenuation
      3. 9.2.3 RTD Amplifier
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 相关链接
    2. 12.2 商标
    3. 12.3 静电放电警告
    4. 12.4 术语表
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Typical Characteristics: Table of Graphs

Table 2. Characteristic Performance Measurements

DESCRIPTION FIGURE
IB and IOS vs Common-Mode Voltage Figure 1
Input Bias Current vs Temperature Figure 2
Output Voltage Swing vs Output Current (Maximum Supply) Figure 3
CMRR vs Temperature Figure 4
0.1-Hz to 10-Hz Noise Figure 5
Input Voltage Noise Spectral Density vs Frequency Figure 6
Open-Loop Gain and Phase vs Frequency Figure 7
Open-Loop Gain vs Temperature Figure 8
Open-Loop Output Impedance vs Frequency Figure 9
Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) Figure 10, Figure 11
No Phase Reversal Figure 12
Positive Overload Recovery Figure 13
Negative Overload Recovery Figure 14
Small-Signal Step Response (100 mV) Figure 15, Figure 16
Large-Signal Step Response Figure 17, Figure 18
Large-Signal Settling Time (10-V Positive Step) Figure 19
Large-Signal Settling Time (10-V Negative Step) Figure 20
Short-Circuit Current vs Temperature Figure 21
Maximum Output Voltage vs Frequency Figure 22
Channel Separation vs Frequency Figure 23
EMIRR IN+ vs Frequency Figure 24