ZHCSSH3A September   2000  – September 2023 OPA177

PRODUCTION DATA  

  1.   1
  2. 1特性
  3. 2应用
  4. 3说明
  5. 4Revision History
  6. 5Pin Configuration and Functions
  7. 6Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Offset Voltage Adjustment
      2. 7.1.2 Input Protection
      3. 7.1.3 Noise Performance
      4. 7.1.4 Input Bias Current Cancellation
    2. 7.2 Typical Application
  9. 8Device and Documentation Support
    1. 8.1 器件支持
      1. 8.1.1 开发支持
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ 仿真软件(免费下载)
        3. 8.1.1.3 DIP-Adapter-EVM
        4. 8.1.1.4 DIYAMP-EVM
        5. 8.1.1.5 TI 参考设计
        6. 8.1.1.6 滤波器设计工具
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. 9Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|8
  • P|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

Electrical Characteristics

at TA = 25°C, VS = 30 V (±15 V), VCM = VOUT = VS / 2, and RL = 2 kΩ connected to VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS    Input offset voltage F grade ±10 ±25 µV
G grade ±20 ±60
TA = –40°C to +85°C F grade ±15 ±40
G grade ±20 ±100
dVOS/dT Input offset voltage drift TA = –40°C to +85°C F grade ±0.1 ±0.3 µV/°C
G grade ±0.7 ±1.2
Offset adjustment range RP = 20 kΩ ±3 mV
Long-term drift(1) F grade 0.3 µV/mo
G grade 0.4
PSRR Power-supply rejection ratio VS = ±3 V to ±18 V F grade 115 125 dB
G grade 110 120
VS = ±3 V to ±18 V
TA = –40°C to +85°C
F grade 110 120
G grade 106 115
INPUT BIAS CURRENT
IB Input bias current F grade ±0.5 ±2 nA
G grade ±0.5 ±2.8
TA = –40°C to +85°C F grade ±0.5 ±4
G grade ±0.5 ±6
Input bias current drift(2) TA = –40°C to +85°C F grade ±8 ±40 pA/°C
G grade ±15 ±60
IOS Input offset current F grade ±0.3 ±1.5 nA
G grade ±0.3 ±2.8
TA = –40°C to +85°C F grade ±0.5 ±2.2
G grade ±0.5 ±4.5
NOISE
Input bias current drift(2) F grade ±1.5 ±40 pA/°C
G grade ±1.5 ±85
Input voltage noise f =1 Hz to 100 Hz(3) 85 150 nVrms
Input current noise f =1 Hz to 100 Hz 45 pArms
INPUT VOLTAGE
VCM Common-mode voltage range(4) ±13 ±14 V
TA = –40°C to +85°C ±13 ±13.5
CMRR Common-mode rejection ratio VCM = ±13 V F grade 130 140 dB
G grade 115 140
VCM = ±13 V
TA = –40°C to +85°C
F grade 120 140
G grade 110 140
INPUT IMPEDANCE
Rin Input resistance Differential mode(5) F grade 26 45
G grade 18.5 45
Common-mode 200
OPEN-LOOP GAIN
AOL Open-loop voltage gain(6)   –10 V ≤ VO ≤ 10 V F grade 134 141 dB
G grade 126 135
–10 V ≤ VO ≤ 10 V
TA = –40°C to +85°C
F grade 126 135
G grade 120 132
FREQUENCY RESPONSE
BWCL Closed-loop bandwidth G = 1 0.4 0.6 MHz
SR Slew rate 0.1 0.3 V/µs
OUTPUT
VO Voltage output swing RL ≥ 2 kΩ ±13.5 ±14 V
TA = –40°C to +85°C ±12 ±13
RL ≥ 10 kΩ ±12.5 ±13
RL ≥ 1 kΩ ±12 ±12.5
ISC Short-circuit current ±35 mA
RO Open-loop output resistance 60 Ω
POWER SUPPLY
Power consumption IO = 0 A  40 60 mW
TA = –40°C to +85°C 60 75
IQ Quiescent current   IO = 0 A 1.3 2 mA
TA = –40°C to +85°C 2 2.5
Long-term input offset voltage stability refers to the averaged trend line of VOS vs time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in VOS during the first 30 operating days are typically less than 2 μV.
Specified by characterization.
Sample tested.
Specified CMRR test condition.
Specified by design.
To maintain high open-loop gain throughout the ±10-V output range, AOL is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤ VO ≤ +10 V.