ZHCSTL4 October   2023 MSPM0C1104

ADVANCE INFORMATION  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. 功能方框图
  6. Device Comparison
  7. Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
    3. 6.3 Signal Descriptions
    4. 6.4 Connections for Unused Pins
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 POR and BOR
      2. 7.6.2 Power Supply Ramp
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
    10. 7.10 Digital IO
      1. 7.10.1  Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 ADC
      1. 7.11.1 Electrical Characteristics
      2. 7.11.2 Switching Characteristics
      3. 7.11.3 Linearity Parameters
      4. 7.11.4 Typical Connection Diagram
    12. 7.12 Temperature Sensor
    13. 7.13 VREF
      1. 7.13.1 Voltage Characteristics
      2. 7.13.2 Electrical Characteristics
    14. 7.14 I2C
      1. 7.14.1 I2C Characteristics
      2. 7.14.2 I2C Filter
      3. 7.14.3 I2C Timing Diagram
    15. 7.15 SPI
      1. 7.15.1 SPI
      2. 7.15.2 SPI Timing Diagram
    16. 7.16 UART
    17. 7.17 TIMx
    18. 7.18 Windowed Watchdog Characteristics
    19. 7.19 Emulation and Debug
      1. 7.19.1 SWD Timing
  9. Detailed Description
    1. 8.1  CPU
    2. 8.2  Operating Modes
      1. 8.2.1 Functionality by Operating Mode (MSPM0C110x)
    3. 8.3  Power Management Unit (PMU)
    4. 8.4  Clock Module (CKM)
    5. 8.5  DMA
    6. 8.6  Events
    7. 8.7  Memory
      1. 8.7.1 Memory Organization
      2. 8.7.2 Peripheral File Map
      3. 8.7.3 Peripheral Interrupt Vector
    8. 8.8  Flash Memory
    9. 8.9  SRAM
    10. 8.10 GPIO
    11. 8.11 IOMUX
    12. 8.12 ADC
    13. 8.13 Temperature Sensor
    14. 8.14 VREF
    15. 8.15 CRC
    16. 8.16 UART
    17. 8.17 SPI
    18. 8.18 I2C
    19. 8.19 WWDT
    20. 8.20 Timers (TIMx)
    21. 8.21 Input/Output Diagrams
    22. 8.22 Serial Wire Debug Interface
    23. 8.23 Device Factory Constants
    24. 8.24 Identification
  10. Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 静电放电警告
    6. 10.6 术语表
  12. 11Mechanical, Packaging, and Orderable Information
  13. 12Revision History

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Linearity Parameters

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted), all TYP values are measured at 25℃ and all linearity parameters are measured using 12-bit resolution mode (unless otherwise noted) (1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
EI Integral linearity error (INL) VDD reference, 10-bit (2) -1.0 +1.0 LSB
VDD reference, 12-bit (2) -4.0 +4.0 LSB
EI Integral linearity error (INL) Internal reference, 10-bit  -1.0 +1.0 LSB
Internal reference, 12-bit  -4.0 +4.0 LSB
ED Differential linearity error (DNL) 10-bit VDD reference (2) -1.0 +1.0 LSB
12-bit VDD reference (2) -1.0 +4.0 LSB
ED Differential linearity error (DNL)
 
Internal reference, 10-bit  -1.0 +1.0 LSB
Internal reference, 12-bit  -1.0 +4.0 LSB
EO Offset error VDD reference, 10-bit (2) -5 5 mV
VDD reference, 12-bit (2) -5 5 mV
EO Offset error Internal reference, 10-bit  -5 5 mV
Internal reference, 12-bit -5 5 mV
EG Gain error VDD reference, 10-bit (2) -5 5 LSB
VDD reference, 12-bit (2) TBD TBD LSB
Total Unadjusted Error (TUE) can be calculated from E, E, and EG using the following formula: TUE = √( EI2 + |EO|2 + EG2 )
Note: You must convert all of the errors into the same unit, usually LSB, for the above equation to be accurate
VDD reference specifications are measured with VR+ = VDD and VR- 0V.