SNOSA35G August   2002  – July 2015 LMH6657 , LMH6658

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics, 5 V
    6. 6.6 Electrical Characteristics, ±5 V
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Large Signal Behavior
    2. 7.2 Feature Description
    3. 7.3 Device Functional Modes
      1. 7.3.1 Output Phase Reversal
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Characteristics
        1. 8.1.1.1 Output Current Capability
        2. 8.1.1.2 Driving Capacitive Loads
        3. 8.1.1.3 Distortion
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VIN Differential ±2.5 V
Output Short Circuit Duration See (2)(4)
Input Current ±10 mA
Supply Voltage (V+ - V) 12.6 V
Voltage at Input/Output pins V − 0.8 V+ + 0.8 V
Soldering Information Infrared or Convection (20 sec.) 260 °C
Wave Soldering (10 sec.) 260
Storage temperature, Tstg –65 100 °C
Junction Temperature(3) 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C.
(3) The maximum power dissipation is a function of TJ(MAX), RθJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ RθJA . All numbers apply for packages soldered directly onto a PCB.
(4) Output short circuit duration is infinite for VS < 6 V at room temperature and below. For VS > 6 V, allowable short circuit duration is 1.5ms.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(3) ±2000 V
Machine Model(2) ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.
(2) Machine Model, 0 Ω in series with 200 pF.
(3) Human body model, 1.5 kΩ in series with 100 pF.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply Voltage (V+ – V) 3 12 V
Operating Temperature(2) −40 85 °C

6.4 Thermal Information

THERMAL METRIC(1) LMH6657 LMH6658 UNIT
DBV (SOT-23) DCK (SC70) D (SOIC) DGK (VSSOP)
5 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance(2) 265 478 190 235 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) The maximum power dissipation is a function of TJ(MAX), RθJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ RθJA . All numbers apply for packages soldered directly onto a PCB.

6.5 Electrical Characteristics, 5 V

Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5 V, V = 0 V, VCM = VO = V+/2, and RL = 100Ω (or as specified) tied to V+/2.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
GB Gain Bandwidth Product VOUT < 200 mVPP 140 MHz
SSBW −3-dB BW AV = +1, VOUT = 200 mVPP 220 270 MHz
AV = +2 or −1, VOUT = 200 mVPP 100
GFP Frequency Response Peaking AV = +2, VOUT = 200 mVPP,
DC to 100 MHz
1.5 dB
GFR Frequency Response Rolloff AV = +2, VOUT = 200 mVPP,
DC to 100 MHz
0.5 dB
LPD 1° Linear Phase Deviation AV = +2, VOUT = 200 mVPP, ±1° 30 MHz
GF0.1dB 0.1-dB Gain Flatness AV = +2, ±0.1 dB, VOUT = 200 mVPP 13 MHz
PBW Full Power Bandwidth −1 dB, VOUT = 3 VPP, AV = −1 55 MHz
DG Differential Gain NTSC, VCM = 2 V, RL = 150 Ω to V+/2, Pos. Video Only 0.03%
DP Differential Phase NTSC, VCM = 2 V, RL=150 Ω to V+/2 Pos. Video Only 0.1 deg
TIME DOMAIN RESPONSE
tr Rise and Fall Time AV = +2, VOUT = 500 mVPP 3.3 ns
AV = −1, VOUT = 500 mVPP 3.4
OS Overshoot, Undershoot AV = +2, VOUT = 500 mVPP 18%
ts Settling Time VO = 2 VPP, ±0.1%, RL = 500 Ω to V+/2, AV = −1 37 ns
SR Slew Rate(3) AV = −1, VO = 3VPP(4) 470 V/µs
AV = +2, VO = 3VPP(4) 420
DISTORTION AND NOISE RESPONSE
HD2 2nd Harmonic Distortion f = 5MHz, VO = 2VPP, AV = -1 −70 dBc
HD3 3rd Harmonic Distortion f = 5MHz, VO = 2VPP, AV = -1 −57 dBc
THD Total Harmonic Distortion f = 5MHz, VO = 2VPP, AV = -1 −55.5 dBc
Vn Input-Referred Voltage Noise f = 100KHz 11 nV/√Hz
f = 1KHz 19
In Input-Referred Current Noise f = 100KHz 2.1 pA/√Hz
f = 1KHz 7.5
XTLKA Cross-Talk Rejection (LMH6658) f = 5MHz, RL (SND) = 100Ω
RCV: RF = RG = 1k
69 dB
STATIC, DC PERFORMANCE
AVOL Large Signal Voltage Gain VO = 1.25V to 3.75V,
RL = 2k to V+/2
85 95 dB
VO = 1.5V to 3.5V,
RL = 150Ω to V+/2
75 85
VO = 2V to 3V,
RL = 50Ω to V+/2
70 80
CMVR Input Common-Mode Voltage Range CMRR ≥ 50dB −0.2 −0.5 V
At the temperature extremes −0.1
3 3.3
At the temperature extremes 2.8
VOS Input Offset Voltage ±1.1 ±5 mV
At the temperature extremes ±7
TC VOS Input Offset Voltage Average Drift See(6) ±2 μV/C
IB Input Bias Current See(5) −5 −20 μA
At the temperature extremes −30
TC IB Input Bias Current Average Drift See(6) 0.01 nA/°C
IOS Input Offset Current 50 300 nA
At the temperature extremes 500
CMRR Common-Mode Rejection Ratio VCM Stepped from 0V to 3.0V 72 82 dB
+PSRR Positive Power Supply Rejection Ratio V+ = 4.5V to 5.5V, VCM = 1V 72 82 dB
IS Supply Current (per channel) No load 6.2 8.5 mA
At the temperature extremes 10
MISCELLANEOUS PERFORMANCE
VOH Output Swing
High
RL = 2k to V+/2 4.1 4.25 V
At the temperature extremes 3.8
RL = 150Ω to V+/2 4 4.19
At the temperature extremes 3.7
RL = 75Ω to V+/2 3.85 4.15
At the temperature extremes 3.5
VOL Output Swing
Low
RL = 2k to V+/2 900 800 mV
At the temperature extremes 1100
RL = 150Ω to V+/2 970 870
At the temperature extremes 1200
R L = 75Ω to V+/2 990 885
At the temperature extremes 1250
IOUT Output Current VOUT = 1V from either rail Sourcing 40 85 mA
Sinking –40 105
ISC Output Short CircuitCurrent(7) Sourcing to V+/2 100 155 mA
At the temperature extremes 80
Sinking to V+/2 100 220
At the temperature extremes 80
RIN Common-Mode Input Resistance 3
CIN Common-Mode Input Capacitance 1.8 pF
ROUT Output Impedance f = 1MHz, AV = +1 0.06 Ω
(1) All limits are ensured by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Slew rate is the "worst case" of the rising and falling slew rates.
(4) Output Swing not limited by Slew Rate limit.
(5) Positive current corresponds to current flowing into the device.
(6) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.
(7) Short circuit test is a momentary test. See Note 3 under Absolute Maximum Ratings.

6.6 Electrical Characteristics, ±5 V

Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5 V, V = −5 V, VCM = VO, and RL = 100 Ω (or as specified) tied to 0 V.
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
GB Gain Bandwidth Product VOUT < 200 mVPP 140 MHz
SSBW −3-dB BW AV = +1, VOUT = 200 mVPP 220 270 MHz
AV = +2 or −1, VOUT = 200 mVPP 100
GFP Frequency Response Peaking AV = +2, VOUT = 200 mVPP,
DC to 100 MHz
1 dB
GFR Frequency Response Rolloff AV = +2, VOUT = 200 mVPP,
DC to 100 MHz
0.9 dB
LPD 1° Linear Phase Deviation AV = +2, VOUT = 200mVPP, ±1° 30 MHz
GF0.1dB 0.1-dB Gain Flatness AV = +2, ±0.1 dB, VOUT = 200 mVPP 20 MHz
PBW Full Power Bandwidth −1 dB, VOUT = 8 VPP, AV = −1 30 MHz
DG Differential Gain NTSC, RL = 150 Ω, Pos. or Neg. Video 0.03%
DP Differential Phase NTSC,RL = 150 Ω, Pos. or Neg. Video 0.1 deg
TIME DOMAIN RESPONSE
tr Rise and Fall Time AV = +2, VOUT = 500 mVPP 3.3 ns
AV = −1, VOUT = 500 mVPP 3.3
OS Overshoot, Undershoot AV = +2, VOUT = 500 mVPP 16%
ts Settling Time VO = 5 VPP, ±0.1%, RL =500 Ω,
AV = −1
35 ns
SR Slew Rate(4) AV = −1, VO = 8 VPP 700 V/µs
AV = +2, VO = 8 VPP 500
DISTORTION AND NOISE RESPONSE
HD2 2nd Harmonic Distortion f = 5 MHz, VO = 2 VPP, AV = -1 −70 dBc
HD3 3rd Harmonic Distortion f = 5 MHz, VO = 2 VPP, AV = -1 −57 dBc
THD Total Harmonic Distortion f = 5 MHz, VO = 2 VPP, AV = -1 −55.5 dBc
Vn Input-Referred Voltage Noise f = 100 KHz 11 nV/√Hz
f = 1 KHz 19
In Input-Referred Current Noise f = 100 KHz 2.1 pA/√Hz
f = 1 KHz 7.5
XTLKA Cross-Talk Rejection (LMH6658) f = 5 MHz, RL (SND) = 100 Ω
RCV: RF = RG = 1 k
69 dB
STATIC, DC PERFORMANCE
AVOL Large Signal Voltage Gain VO = −3.75 V to 3.75 V, RL = 2 k 87 100 dB
VO = −3.5 V to 3.5 V, RL = 150 Ω 80 90
VO = −3 V to 3 V, RL = 50 Ω 75 85
CMVR Input Common-Mode Voltage Range CMRR ≥ 50 dB −5.2 −5.5 V
At the temperature extremes −5.1
3 3.3
At the temperature extremes 2.8
VOS Input Offset Voltage ±1 ±5 mV
Apply at the temperature extremes ±7
TC VOS Input Offset Voltage Average Drift See (6) ±2 μV/C
IB Input Bias Current See (3) −5 −20 μA
At the temperature extremes −30
TCIB Input Bias Current Average Drift See (6) 0.01 nA/°C
IOS Input Offset Current 50 300 nA
At the temperature extremes 500
CMRR Common-Mode Rejection Ratio VCM Stepped from −5 V to 3 V 75 84 dB
+PSRR Positive Power Supply Rejection Ratio V+ = 4.5 V to 5.5 V, VCM = −4 V 75 82 dB
−PSRR Negative Power Supply Rejection Ratio V = −4.5 V to −5.5 V 78 85 dB
IS Supply Current (per channel) No load 6.5 9 mA
At the temperature extremes 11
MISCELLANEOUS PERFORMANCE
VOH Output Swing
High
RL = 2 k 4.1 4.25 V
At the temperature extremes 3.8
RL = 150 Ω 4 4.2
At the temperature extremes 3.7
RL = 75 Ω 3.85 4.18
At the temperature extremes 3.5
VOL Output Swing
Low
RL = 2 k −4.05 −4.19 V
At the temperature extremes −3.8
RL = 150 Ω −3.9 −4.05
At the temperature extremes −3.65
R L = 75 Ω −3.8 −4
At the temperature extremes −3.5
IOUT Output Current VOUT = 1 V from either rail Sourcing 45 100 mA
Sinking –45 –110
ISC Output Short Circuit Current(5) Sourcing to Ground 120 180 mA
At the temperature extremes 100
Sinking to Ground 120 230
At the temperature extremes 100
RIN Common-Mode Input Resistance 4
CIN Common-Mode Input Capacitance 1.8 pF
ROUT Output Impedance f = 1 MHz, AV = +1 0.06 Ω
(1) Typical values represent the most likely parametric norm.
(2) All limits are ensured by testing or statistical analysis.
(3) Positive current corresponds to current flowing into the device.
(4) Slew rate is the "worst case" of the rising and falling slew rates.
(5) Short circuit test is a momentary test. See Note 3 under Absolute Maximum Ratings.
(6) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.

6.7 Typical Characteristics

LMH6657 LMH6658 20053226.gif
Figure 1. Noninverting Frequency Response, Gain
LMH6657 LMH6658 20053227.gif
Figure 3. Noninverting Frequency Response, Phase
LMH6657 LMH6658 20053223.gif
Figure 5. Open Loop Gain/Phase vs. Frequency
LMH6657 LMH6658 20053242.gif
Figure 7. Phase Margin vs. VCM
LMH6657 LMH6658 20053203.gif
Figure 9. Output vs. Input
LMH6657 LMH6658 20053201.gif
Figure 11. PSRR vs. Frequency
LMH6657 LMH6658 20053202.gif
Figure 13. Noise vs. Frequency
LMH6657 LMH6658 20053210.gif
Figure 15. Output Impedance vs. Frequency
LMH6657 LMH6658 20053212.gif
Figure 17. HD vs. VOUT
LMH6657 LMH6658 20053214.gif
Figure 19. HD vs. Frequency
LMH6657 LMH6658 20053243.gif
Figure 21. VOUT vs. ISOURCE
LMH6657 LMH6658 20053245.gif
Figure 23. VOUT vs. ISOURCE
LMH6657 LMH6658 20053230.gif
Figure 25. Short Circuit Current
LMH6657 LMH6658 20053208.gif
Figure 27. Settling Time vs. Output Step Amplitude
LMH6657 LMH6658 20053209.gif
Figure 29. 0.1% Settling Time vs. Cap Load
LMH6657 LMH6658 20053239.gif
Figure 31. ΔVOS vs. VOUT
LMH6657 LMH6658 20053238.gif
Figure 33. IS/Amp vs. VCM
LMH6657 LMH6658 20053234.gif
Figure 35. VOS vs. VS (for 3 Representative Units)
LMH6657 LMH6658 20053235.gif
Figure 37. VOS vs. VS (for 3 Representative Units)
LMH6657 LMH6658 20053228.gif
Figure 39. |IB| vs. VS
LMH6657 LMH6658 20053222.gif
Figure 41. Small Signal Step Response
LMH6657 LMH6658 20053216.gif
Figure 43. Small Signal Step Response
LMH6657 LMH6658 20053217.gif
Figure 45. Large Signal Step Response
LMH6657 LMH6658 20053218.gif
Figure 47. Large Signal Step Response
LMH6657 LMH6658 20053224.gif
Figure 2. Inverting Frequency Response, Gain
LMH6657 LMH6658 20053225.gif
Figure 4. Inverting Frequency Response, Phase
LMH6657 LMH6658 20053241.gif
Figure 6. Unity Gain Frequency vs. VCM
LMH6657 LMH6658 20053204.gif
Figure 8. Output vs. Input
LMH6657 LMH6658 20053206.gif
Figure 10. CMRR vs. Frequency
LMH6657 LMH6658 20053211.gif
Figure 12. DG/DP vs. IRE
LMH6657 LMH6658 20053205.gif
Figure 14. Crosstalk Rejection vs. Frequency
LMH6657 LMH6658 20053213.gif
Figure 16. HD vs. VOUT
LMH6657 LMH6658 20053253.gif
Figure 18. THD vs. VOUT
LMH6657 LMH6658 20053215.gif
Figure 20. HD vs. Frequency
LMH6657 LMH6658 20053244.gif
Figure 22. VOUT vs. ISINK
LMH6657 LMH6658 20053246.gif
Figure 24. VOUT vs. ISINK
LMH6657 LMH6658 20053231.gif
Figure 26. Short Circuit Current
LMH6657 LMH6658 20053207.gif
Figure 28. Settling Time vs. Output Step Amplitude
LMH6657 LMH6658 20053240.gif
Figure 30. ΔVOS vs. VOUT
LMH6657 LMH6658 20053232.gif
Figure 32. IS /Amp vs. VS
LMH6657 LMH6658 20053237.gif
Figure 34. IS/Amp vs. VCM
LMH6657 LMH6658 20053233.gif
Figure 36. VOS vs. VS (for 3 Representative Units)
LMH6657 LMH6658 20053236.gif
Figure 38. VOS vs. VCM (A Typical Unit)
LMH6657 LMH6658 20053229.gif
Figure 40. IOS vs. VS
LMH6657 LMH6658 20053220.gif
Figure 42. Small Signal Step Response
LMH6657 LMH6658 20053221.gif
Figure 44. Small Signal Step Response
LMH6657 LMH6658 20053219.gif
Figure 46. Large Signal Step Response