SNOSA35G August   2002  – July 2015 LMH6657 , LMH6658

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics, 5 V
    6. 6.6 Electrical Characteristics, ±5 V
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Large Signal Behavior
    2. 7.2 Feature Description
    3. 7.3 Device Functional Modes
      1. 7.3.1 Output Phase Reversal
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Characteristics
        1. 8.1.1.1 Output Current Capability
        2. 8.1.1.2 Driving Capacitive Loads
        3. 8.1.1.3 Distortion
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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10 Layout

10.1 Layout Guidelines

Generally, a good high frequency layout will keep power supply and ground traces away from the inverting input and output pins. Parasitic capacitances on these nodes to ground will cause frequency response peaking and possible circuit oscillations. See Application Note OA-15, Frequent Faux Pas in Applying Wideband Current Feedback Amplifiers (SNOA367) for more information. TI suggests the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization:

Table 1. Evaluation Board Guide

DEVICE PACKAGE EVALUATION BOARD PIN
LMH6657MF SOT-23-5 LMH730216
LMH6657MG SC-70 LMH730165
LMH6658MA 8-Pin SOIC LMH730036
LMH6658MM 8-Pin VSSOP LMH730123

Another important parameter in working with high speed/high performance amplifiers, is the component values selection. Choosing external resistors that are large in value will effect the closed loop behavior of the stage because of the interaction of these resistors with parasitic capacitances. These capacitors could be inherent to the device or a by-product of the board layout and component placement. Either way, keeping the resistor values lower, will diminish this interaction to a large extent. On the other hand, choosing very low value resistors will load down nodes and will contribute to higher overall power dissipation.

10.2 Layout Example

LMH6657 LMH6658 lay01_silk_snosak9.gif
SC-70 Board Layout (Actual size = 1.5 in × 1.5 in)
Figure 54. Layer 1 Silk
LMH6657 LMH6658 lay02_silk_snosak9.jpg
SC-70 Board Layout (Actual size = 1.5 in × 1.5 in)
Figure 55. Layer 2 Silk