ZHCSJ91C September   2005  – July 2021 DS90LV011AH

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings (1) (1)
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DS90LV011AH Driver Functionality
      2. 8.3.2 Driver Output Voltage and Power-On Reset
      3. 8.3.3 Driver Offset
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Driver Supply Voltage
        2. 9.2.2.2 Driver Bypass Capacitance
        3. 9.2.2.3 Driver Input Votlage
        4. 9.2.2.4 Driver Output Voltage
        5. 9.2.2.5 Interconnecting Media
        6. 9.2.2.6 PCB Transmission Lines
      3. 9.2.3 Termination Resistor
      4. 9.2.4 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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9.2.2.4 Driver Output Voltage

DS90LV011AH driver output has a 1.2-V common-mode voltage, with a nominal differential output signal of 350 mV. This 350 mV is the absolute value of the differential swing (VOD = |V+– V–|). The peak-to-peak differential voltage is twice this value, or 700 mV. LVDS receiver thresholds are ±100 mV. With these receiver decision thresholds, it is clear that the disadvantage of operating the driver with a lower supply will be noise margin. With fully compliant LVDS drivers and receivers, we would expect a minimum of ~150 mV of noise margin (247-mV minimum output voltage – 100-mV maximum input requirement). If we operate the DS90LV011AH with a supply in the range of 3.0 V to 3.6 V, the minimum noise margin will drop to 150 mV.