ZHCSCK9A June   2014  – July 2017 CSD95373BQ5M

PRODUCTION DATA.  

  1. 1特性
  2. 2应用
  3. 3说明
  4. 4修订历史记录
  5. 5Pin Configuration and Functions
  6. 6Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
  7. 7Application Schematic
    1. 7.1 Typical Application
  8. 8器件和文档支持
    1. 8.1 接收文档更新通知
    2. 8.2 社区资源
    3. 8.3 商标
    4. 8.4 静电放电警告
    5. 8.5 Glossary
  9. 9机械、封装和可订购信息
    1. 9.1 机械制图
    2. 9.2 建议印刷电路板 (PCB) 焊盘图案
    3. 9.3 建议模板开口

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DQP|12
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

Top View
CSD95373BQ5M PS_Pinout _latest2.png

Pin Functions

PIN DESCRIPTION
NAME NO.
BOOT 9 Bootstrap capacitor connection. Connect a minimum of 0.1-µF, 16-V, X7R ceramic capacitor from BOOT to BOOT_R pins. The bootstrap capacitor provides the charge to turn on the control FET. The bootstrap diode is integrated.
BOOT_R 8 Return path for HS gate driver, connected to VSW internally.
ENABLE 3 Enables device operation. If ENABLE = logic HIGH, turns on device. If ENABLE = logic LOW, the device is turned off and both MOSFET gates are actively pulled low. An internal 100-kΩ pulldown resistor will pull the ENABLE pin LOW if left floating.
FCCM 10 This pin enables the Diode Emulation function. When this pin is held LOW, Diode Emulation Mode is enabled for sync FET. When FCCM is HIGH, the device is operated in Forced Continuous Conduction Mode. An internal 5-µA current source will pull the FCCM pin to 3.3 V if left floating.
IOUT 1 Output of current sensing amplifier. V(IOUT) – V(REFIN) is proportional to the phase current.
PGND 4 Power ground, connected directly to pin 13.
PGND 13 Power ground.
PWM 12 Pulse width modulated tri-state input from external controller. Logic LOW sets control FET gate low and sync FET gate high. Logic HIGH sets control FET gate high and sync FET gate low. Open or Hi-Z sets both MOSFET gates low if greater than the tri-state shutdown hold-off time (t3HT).
REFIN 2 External reference voltage input for current sensing amplifier.
TAO/
FAULT		 11 Temperature analog output. Reports a voltage proportional to the die temperature. An ORing diode is integrated in the IC. When used in multiphase application, a single wire can be used to connect the TAO pins of all the ICs. Only the highest temperature will be reported. TAO will be pulled up to 3.3 V if thermal shutdown occurs. TAO should be bypassed to PGND with a 1-nF, 16-V, X7R ceramic capacitor.
VDD 5 Supply voltage to gate driver and internal circuitry.
VIN 7 Input voltage pin. Connect input capacitors close to this pin.
VSW 6 Phase node connecting the HS MOSFET source and LS MOSFET drain - pin connection to the output inductor.