ZHCSSQ9G october   1980  – august 2023 AM26LS32AC , AM26LS32AM , AM26LS33AM

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Dissipation Ratings
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
    1.     17
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1.      23
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 接收文档更新通知
    2. 10.2 支持资源
    3. 10.3 Trademarks
    4. 10.4 静电放电警告
    5. 10.5 术语表
  12. 11Mechanical, Packaging, and Orderable Information

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9.2.2 Detailed Design Procedure

Add a VCC bypass capacitor (0.1 µF or more). Either enable (G pin) input can turn on the receivers, so connect the desired enable to a compatible logic line output. The other enable input must be tied to the inactive state supply rail. If the receivers must always be active, then connect both enables to the supply rail such that at least one is set to an active-state rail. VCC must be 5 V within 10% and logic inputs must provide TTL-compatible voltage levels A & B Inputs can lead to an external connector or can be left unconnected. The last receiver on a cable requires termination, either on-board or use as an external resistor. Unused Y outputs can be left unconnected.