ZHCS147D May   2013  – August 2015

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 推荐的器件和设计
  6. 6 Pin Configurations and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: 3-Wire Operation
    7. 7.7 Timing Requirements: 4-Wire Operation
    8. 7.8 Timing Requirements: Daisy-Chain
    9. 7.9 Typical Characteristics
  8. 8 Parametric Measurement Information
    1. 8.1 Equivalent Circuits
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Analog Input
      2. 9.3.2 Reference
      3. 9.3.3 Clock
      4. 9.3.4 ADC Transfer Function
    4. 9.4 Device Functional Modes
      1. 9.4.1 CS Mode
        1. 9.4.1.1 3-Wire CS Mode Without a Busy Indicator
        2. 9.4.1.2 3-Wire CS Mode With a Busy Indicator
        3. 9.4.1.3 4-Wire CS Mode Without a Busy Indicator
        4. 9.4.1.4 4-Wire CS Mode With a Busy Indicator
      2. 9.4.2 Daisy-Chain Mode
        1. 9.4.2.1 Daisy-Chain Mode Without a Busy Indicator
        2. 9.4.2.2 Daisy-Chain Mode With a Busy Indicator
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 ADC Reference Driver
      2. 10.1.2 ADC Input Driver
        1. 10.1.2.1 Input Amplifier Selection
        2. 10.1.2.2 Antialiasing Filter
    2. 10.2 Typical Applications
      1. 10.2.1 DAQ Circuit for a 1-µs, Full-Scale Step Response
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Low-Power DAQ Circuit for Excellent Dynamic Performance at 1 MSPS
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curve
      3. 10.2.3 DAQ Circuit for Lowest Distortion and Noise Performance at 1 MSPS
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curve
      4. 10.2.4 Ultralow-Power DAQ Circuit at 10 kSPS
        1. 10.2.4.1 Design Requirements
        2. 10.2.4.2 Detailed Design Procedure
        3. 10.2.4.3 Application Curve
  11. 11Power-Supply Recommendations
    1. 11.1 Power-Supply Decoupling
    2. 11.2 Power Saving
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 文档支持
      1. 13.1.1 相关文档
    2. 13.2 相关链接
    3. 13.3 社区资源
    4. 13.4 商标
    5. 13.5 静电放电警告
    6. 13.6 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 修订历史记录

Changes from C Revision (July 2014) to D Revision

  • 已添加推荐器件和设计部分Go
  • 已更改器件比较表的标题并移至推荐器件和设计部分Go
  • Changed ESD Ratings table to current standards, added HBM and CDM data Go
  • Added timing specifications for different operating temperature ranges for the tconv, td-CK-DO, and tquiet parameters in the Timing Requirements: 3-Wire Operation table Go
  • Added timing specifications for different operating temperature ranges for the tconv parameter in Timing Requirements: 4-Wire Operation tableGo
  • Added timing specifications for different operating temperature ranges for the tconv parameter in Timing Requirements: Daisy-Chain table Go
  • 添加了社区资源部分Go

Changes from B Revision (December 2014) to C Revision

  • 已更改格式以符合最新的数据表标准；已添加新内容并移动现有部分Go
  • 已更改 ADS8881 至 ADS8881C 并添加 ADS8881I Go
  • 已将 ADS8881C 和 ADS8881I 的技术规格分为两项列出（出色的交流和直流性能 特性 要点中）Go
  • 已更改器件信息表以符合最新标准Go
  • 已更新系列信息表并更改脚注Go
  • Added Recommended Operating Conditions tableGo
  • Changed LSB footnote to include how to convert LSB to ppm Go
  • Changed fSCLK parameter maximum specification from 66.6 MHz to 70 MHz in Timing Requirements: 3-Wire Operation table.Go
  • Changed tSCLK parameter minimum specification from 15 ns to 14.3 ns in Timing Requirements: 3-Wire Operation table.Go
  • Added more information about validity of data on SCLK edges in all interface modesGo
  • Changed diagrams and text for better explanation of the daisy-chain feature in the Daisy-Chain Mode sectionGo
  • Changed Equation 2 and Equation 3 Go
  • Added Layout Guidelines sectionGo

Changes from A Revision (July 2013) to B Revision

  • Changed 宽共模电压范围 特性 要点）Go
  • 已添加注 2 至系列信息表Go
  • Changed External Reference Input, Reference input current parameter typical specification from 350 to 300Go
  • Added External Reference Input, Reference leakage current parameter to Electrical CharacteristicsGo
  • Changed Power-Supply Requirements, Power-supply voltage parameter digital interface supply range as a function of SCLK in Electrical CharacteristicsGo
  • Added Digital Inputs, Digital input leakage current parameter to Electrical CharacteristicsGo
  • Added true-differential input feature details to Analog Input sectionGo
  • Deleted shading from Figure 64Go
  • Deleted shading from Figure 65Go
  • Deleted shading from Figure 67Go
  • Deleted shading from Figure 69Go
  • Deleted shading from Figure 70Go
  • Deleted shading from Figure 72Go
  • Added power scaling with throughput feature details to Power Saving sectionGo

Changes from * Revision (May 2013) to A Revision

  • Changed 文档状态至“量产数据”；通篇进行 pre-RTM 修改Go