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UCC21542

現行

Reinforced, 4A/6A dual-channel isolated gate driver w/ disable

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UCC21550 現行 Reinforced, 4A/6A dual-channel isolated gate driver w/ disable, programmable deadtime Next gen P2P refresh

產品詳細資料

Number of channels 2 Isolation rating Reinforced Power switch IGBT, MOSFET Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 1000 Transient isolation voltage (VIOTM) (VPK) 8000 Peak output current (A) 6 Peak output current (source) (typ) (A) 4 Peak output current (sink) (typ) (A) 6 Features Disable, Programmable dead time Output VCC/VDD (min) (V) 9.2 Output VCC/VDD (max) (V) 18 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 1414 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 5, 8
Number of channels 2 Isolation rating Reinforced Power switch IGBT, MOSFET Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 1000 Transient isolation voltage (VIOTM) (VPK) 8000 Peak output current (A) 6 Peak output current (source) (typ) (A) 4 Peak output current (sink) (typ) (A) 6 Features Disable, Programmable dead time Output VCC/VDD (min) (V) 9.2 Output VCC/VDD (max) (V) 18 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 1414 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 5, 8
SOIC (DW) 16 106.09 mm² (10.3 mm × 10.3 mm) SOIC (DWK) 14 106.09 mm² (10.3 mm × 10.3 mm)
  • Wide body package options
    • DW SOIC-16: pin-2-pin to UCC21520
    • DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
  • Up to 4A peak source and 6A peak sink output
  • Up to 18V VDD output drive supply
    • 5V and 8V VDD UVLO options
  • CMTI greater than 125V/ns
  • Switching parameters:
    • 33ns typical propagation delay
    • 6ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • Resistor-programmable dead time
  • TTL and CMOS compatible inputs
  • Safety-related certifications (planned):
    • 8000VPK reinforced isolation per DIN EN IEC 60747-17 (VDE 0884-17)
    • 5700VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2022
  • Wide body package options
    • DW SOIC-16: pin-2-pin to UCC21520
    • DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
  • Up to 4A peak source and 6A peak sink output
  • Up to 18V VDD output drive supply
    • 5V and 8V VDD UVLO options
  • CMTI greater than 125V/ns
  • Switching parameters:
    • 33ns typical propagation delay
    • 6ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • Resistor-programmable dead time
  • TTL and CMOS compatible inputs
  • Safety-related certifications (planned):
    • 8000VPK reinforced isolation per DIN EN IEC 60747-17 (VDE 0884-17)
    • 5700VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2022

The UCC2154x is an isolated dual channel gate driver family designed with up to 4 A/6 A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing, which facilitates higher bus voltage.

The UCC2154x family can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 125-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and negative voltage handling for up to –5-V spikes for 50 ns on input pins. All supplies have UVLO protection.

The UCC2154x is an isolated dual channel gate driver family designed with up to 4 A/6 A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing, which facilitates higher bus voltage.

The UCC2154x family can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 125-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and negative voltage handling for up to –5-V spikes for 50 ns on input pins. All supplies have UVLO protection.

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UCC21541 現行 Reinforced, 1.5A/2.5A dual-channel isolated gate driver w/ disable, programmable deadtime Lower drive current (1.5-A/2.5-A) version
UCC21540 現行 Reinforced, 4A/6A, dual-channel isolated gate driver w/ disable, programmable deadtime Programmable deadtime version

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 UCC2154x Reinforced Isolation Dual-Channel Gate Driver With 3.3mm Channel-to-Channel Spacing Option datasheet (Rev. E) PDF | HTML 2024/11/8
證書 UCC21540 CQC Certificate of Product Certification PDF | HTML 2023/8/17
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 2021/12/16
證書 FPPT2 - Nonoptical Isolating Devices UL 1577 Certificate of Compliance 2021/10/26

設計與開發

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開發板

UCC21540EVM — 具有 3.3mm 通道至通道間距的 5.0-kVrms 絕緣式雙通道閘極驅動器

UCC21540EVM 專為評估 UCC21540 而設計,這是一款具備 4 A 源極和 6-A 汲極峰值電流能力的隔離式雙通道閘極驅動器。此 EVM 可做為驅動功率 MOSFET 的參考設計,提供高達 18V 驅動電壓、UCC21540 接腳功能識別、元件選擇指南和 PCB 配置範例。
使用指南: PDF
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