TXS0104E-Q1
- Qualified for automotive applications
- AEC-Q100 qualified with the following results:
- Device temperature grade 1: –40°C to +125°C ambient operating temperature range
- Device HBM ESD Classification Level 2
- Device CDM ESD Classification Level C6
- No direction-control signal required
- Maximum data rates:
- 24 Mbps maximum (push pull)
- 2 Mbps (open drain)
- 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA ≤ VCCB)
- No power-supply sequencing required—VCCA or VCCB can be ramped first
- ESD protection exceeds JESD 22:
- A Port
- 2000-V Human-Body Model (A114-B)
- 1000-V Charged-Device Model (C101)
- B Port
- 15-kV Human-Body Model (A114-B)
- 1000-V Charged-Device Model (C101)
- A Port
- IEC 61000-4-2 ESD (B port)
- ±8-kV Contact Discharge
- ±10-kV Air-Gap Discharge
The TXS0104E-Q1 device connects an incompatible logic communication from chip-to-chip due to voltage mismatch. This auto-direction translator can be conveniently used to bridge the gap without the need of direction control from the host. Each channel can be mixed and matched with different output types (open-drain or push-pull) and mixed data flows (transmit or receive) without intervention from the host. This 4-bit noninverting translator uses two separate configurable power-supply rails. The A and B ports are designed to track VCCA and VCCB respectively. The VCCB pin accepts any supply voltage from 2.3 V to 5.5 V while the VCCA pin accepts any supply voltage from 1.65 V to 3.6 V such that VCCA is less than or equal to VCCB. This tracking allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.
The TXS0104E-Q1 device is designed so that the OE input circuit is supplied by VCCA.
To be in the high-impedance state during power up or power down, the OE pin must be tied to the GND pin through a pull down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TXS0104E-Q1 Automotive 4-Bit Bidirectional Voltage-Level Translator for Open-Dra datasheet (Rev. F) | PDF | HTML | 2024/10/22 | ||
| 應用說明 | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024/7/12 | |||
| 應用說明 | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024/7/3 | |||
| 應用說明 | Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters | PDF | HTML | 2023/9/29 | |||
| Application brief | Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages | PDF | HTML | 2023/9/5 | |||
| 應用說明 | Do’s and Don’ts for TXB and TXS Voltage Level-Shifters with Edge Rate Accelerato | PDF | HTML | 2023/6/28 | |||
| 選擇指南 | Voltage Translation Buying Guide (Rev. A) | 2021/4/15 | ||||
| 更多文件說明 | Automotive Logic Devices Brochure | 2014/8/27 |
設計與開發
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14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (BQA) | 14 | Ultra Librarian |
| UQFN (RUT) | 12 | Ultra Librarian |
| TSSOP (PW) | 14 | Ultra Librarian |