產品詳細資料

Protocols 10 BASE-T, 100 BASE-T, 1000 BASE-T, LAN, LVDS Configuration 2:1 SPDT Number of channels 8 Bandwidth (MHz) 900 Ron (typ) (mΩ) 4000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5 Supply current (typ) (µA) 250 ESD HBM (typ) (kV) 2 Operating temperature range (°C) -40 to 85 Crosstalk (dB) -90 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 10 CON (typ) (pF) 3.5 Off isolation (typ) (dB) -39 OFF-state leakage current (max) (µA) 1 Propagation delay time (µs) 0.00025 Ron (max) (mΩ) 8000 Ron channel match (max) (Ω) 1.2 RON flatness (typ) (Ω) 0.7 Turnoff time (disable) (max) (ns) 8.5 Turnon time (enable) (max) (ns) 11.5 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols 10 BASE-T, 100 BASE-T, 1000 BASE-T, LAN, LVDS Configuration 2:1 SPDT Number of channels 8 Bandwidth (MHz) 900 Ron (typ) (mΩ) 4000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5 Supply current (typ) (µA) 250 ESD HBM (typ) (kV) 2 Operating temperature range (°C) -40 to 85 Crosstalk (dB) -90 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 10 CON (typ) (pF) 3.5 Off isolation (typ) (dB) -39 OFF-state leakage current (max) (µA) 1 Propagation delay time (µs) 0.00025 Ron (max) (mΩ) 8000 Ron channel match (max) (Ω) 1.2 RON flatness (typ) (Ω) 0.7 Turnoff time (disable) (max) (ns) 8.5 Turnon time (enable) (max) (ns) 11.5 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm) TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm)
  • Wide Bandwidth (BW = 900 MHz Typ)
  • Low Crosstalk (XTALK = -41 dB Typ)
  • Low Bit-to-Bit Skew [tsk(o) = 0.2 ns Max]
  • Low and Flat ON-State Resistance
    (ron = 4 Typ)
  • Low Input/Output Capacitance
    (CON = 10 pF Typ)
  • Rail-to-Rail Switching on Data I/O Ports
    (0 to 5 V)
  • VDD Operating Range From 3 V to 3.6 V
  • Ioff Supports Partial Power-Down-Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Suitable for 10-/100-/1000-Mbit Ethernet Signaling
  • APPLICATIONS
    • 10/100/1000 Base-T Signal Switching
    • Differential (LVDS, LVPECL) Signal Switching
    • Digital Video Signal Routing
    • Notebook Docking Signal Routing
    • Hub and Router Signal Switching

  • Wide Bandwidth (BW = 900 MHz Typ)
  • Low Crosstalk (XTALK = -41 dB Typ)
  • Low Bit-to-Bit Skew [tsk(o) = 0.2 ns Max]
  • Low and Flat ON-State Resistance
    (ron = 4 Typ)
  • Low Input/Output Capacitance
    (CON = 10 pF Typ)
  • Rail-to-Rail Switching on Data I/O Ports
    (0 to 5 V)
  • VDD Operating Range From 3 V to 3.6 V
  • Ioff Supports Partial Power-Down-Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Suitable for 10-/100-/1000-Mbit Ethernet Signaling
  • APPLICATIONS
    • 10/100/1000 Base-T Signal Switching
    • Differential (LVDS, LVPECL) Signal Switching
    • Digital Video Signal Routing
    • Notebook Docking Signal Routing
    • Hub and Router Signal Switching

The TS3L301 is a 16-bit to 8-bit multiplexer/demultiplexer local area network (LAN) switch with a single select (SEL) input. The SEL input controls the data path of the multiplexer/demultiplexer.

The device provides a low and flat ON-state resistance (ron) and an excellent ON-state resistance match. Low input/output capacitance, high-bandwidth, low skew, and low crosstalk among channels make this device suitable for various LAN applications, such as 10/100/1000 Base-T.

The TS3L301 is a 16-bit to 8-bit multiplexer/demultiplexer local area network (LAN) switch with a single select (SEL) input. The SEL input controls the data path of the multiplexer/demultiplexer.

The device provides a low and flat ON-state resistance (ron) and an excellent ON-state resistance match. Low input/output capacitance, high-bandwidth, low skew, and low crosstalk among channels make this device suitable for various LAN applications, such as 10/100/1000 Base-T.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TS3L301 datasheet (Rev. C) 2006/2/15

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模擬型號

HSPICE Model for TS3L301

SCDJ026.ZIP (96 KB) - HSpice 模型
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模擬型號

TS3L301 IBIS Model

SCDM092.ZIP (33 KB) - IBIS 模型
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參考設計

TIDEP0036 — 使用 TMS320C6657 實作高效率 OPUS 轉碼器解決方案的參考設計

TIDEP0036 參考設計提供可在 TMS320C6657 裝置上輕鬆執行的 TI 最佳化 Opus 編碼器/解碼器範例。由於 Opus 支援多種位元率、訊框大小及取樣率(這些全都具有低延遲),因此適用於語音通訊、網路音訊,甚至高性能音訊處理應用。   此設計還特別強調在 DSP 上實作 Opus 編解碼器,相較於通用處理器(例如 ARM)所達成的效能提升。  根據在通用處理器上執行的代碼最佳化程度,在 C66x TI DSP 核心上實作 Opus 編解碼器的性能是實作 ARM CORTEX A-15 的 3 倍。TMS320C66x DSP 同時支援音訊和視訊編解碼器。

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
TVSOP (DGV) 48 Ultra Librarian
TSSOP (DGG) 48 Ultra Librarian

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