TPS7A84A
- Low dropout: 180 mV (maximum) at 3 A with BIAS
- 0.75% (maximum) accuracy over line, load, and temperature with BIAS
- Output voltage noise: 4.4 µVRMS
- Input voltage range:
- Without BIAS: 1.4 V to 6.5 V
- With BIAS: 1.1 V to 6.5 V
- TPS7A8400A output voltage range:
- Adjustable operation: 0.8 V to 5.15 V
- ANY-OUT™ operation: 0.8 V to 3.95 V
- TPS7A8401A output voltage range:
- Adjustable operation: 0.5 V to 5.15 V
- ANY-OUT™ operation: 0.5 V to 2.075 V
- Power-supply ripple rejection:
- 40 dB at 500 kHz
- Excellent load transient response
- Adjustable soft-start in-rush control
- Open-drain power-good (PG) output
The TPS7A84A is a low-noise, low-dropout linear regulator (LDO) capable of sourcing 3 A with only 180-mV of maximum dropout. The device is offered in two output voltage ranges. The TPS7A8400A output voltage is pin-programmable from 0.8 V to 3.95 V, with a 50-mV resolution, and adjustable from 0.8 V to 5.15 V using an external resistor divider. The TPS7A8401A output voltage is pin-programmable from 0.5 V to 2.075 V, with a 25-mV resolution, and adjustable from 0.5 V to 5.15 V using an external resistor divider.
The combination of low-noise, high-PSRR, and high output-current capability makes the TPS7A84A ideal to power noise-sensitive components such as those found in high-speed communications, video, medical, or test and measurement applications. The high performance of the TPS7A84A limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and RF components. Specifically, RF amplifiers benefit from the high-performance and > 5-V output capability of the device.
For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.75% over line, load, and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A84A ensure optimal system performance.
The versatility of the TPS7A84A makes the device a component of choice for many demanding applications.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TPS7A84A 3-A, High-Accuracy (0.75%), Low-Noise (4.4-µVRMS) LDO Regulator datasheet (Rev. C) | PDF | HTML | 2020/12/16 | ||
| 白皮書 | Demystifying LDO Turn-On (Start-Up) Time (Rev. B) | PDF | HTML | 2026/3/10 | |||
| 白皮書 | Reduce System Noise Using Parallel LDOs | PDF | HTML | 2025/11/3 | |||
| 白皮書 | Parallel LDO Architecture Design Using Ballast Resistors | PDF | HTML | 2022/12/14 | |||
| 白皮書 | Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast | PDF | HTML | 2022/12/13 |
設計與開發
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並聯低壓差 (LDO) 計算器是以 Microsoft® Excel® 為基礎的工具,可為使用鎮流器電阻器的並聯 LDO 穩壓器提供最壞情況分析。此工具可幫助使用者判斷所需的並聯 LDO 穩壓器最小數量,以及適合系統要求集的最佳鎮流器電阻。
在並聯應用中使用的常用 LDO 穩壓器的產品規格書資訊會預先填入計算機中。使用者可根據自己的系統需求,評估最符合其系統需求的 LDO 穩壓器裝置。
TIDA-01027 — 在 12.8 GSPS 資料採集系統中發揮最大效能的低雜訊電源供應參考設計
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此並聯低壓差 (LDO) 參考設計展示 TPS7A85 低雜訊 LDO 線性穩壓器在並聯配置中的應用,可為每個 LDO 供應 3.5A 電流,或為每塊電路板供應 7A 電流。額外的設計彈性還包括將該設計堆疊以符合應用當前的需求。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGR) | 20 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。