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微控制器 (MCU) 與處理器
微處理器和 DSP
多媒體與工業網路 SoC

TMS320C6670

現行

適用通訊和電信的 4 核心定點和浮點 DSP

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產品規格表

TMS320C6670

現行
立即訂購

產品詳細資料

CPU 32-/64-bit Frequency (MHz) 1000, 1200 PCIe 2 PCIe Gen2 Hardware accelerators FFT Coprocessor, TCP3d, TCP3e, VCP2 Operating system DSP/BIOS Rating Catalog Operating temperature range (°C) -40 to 100
CPU 32-/64-bit Frequency (MHz) 1000, 1200 PCIe 2 PCIe Gen2 Hardware accelerators FFT Coprocessor, TCP3d, TCP3e, VCP2 Operating system DSP/BIOS Rating Catalog Operating temperature range (°C) -40 to 100
FCBGA (CYP) 841 576 mm² (24 mm × 24 mm)
  • Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.2GHz
    • 153.6 GMAC/76.8 GFLOP @ 1.2GHz
    • 32KB L1P, 32KB L1D, 1024KB L2 Per Core
    • 2MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • Six Lane SerDes-Based Antenna Interface (AIF2) - Operating at up to 6.144 Gbps
  • Hardware Coprocessors
    • -Enhanced Coprocessor for Turbo Encoding
      -Three Enhanced Coprocessors for Turbo Decoding
      -Four Viterbi Decoders
      -Three Fast Fourier Transform Coprocessors
      -Bit Rate CoProcessor
      -Two Receiver Accelerators for WCDMA
      -Transmitt Accelerator for WCDMA
  • Four Rake Search Accelerators for Chip Rate Processing and Reed-Muller Decoding
  • I2C Interface, 16 GPIO Pins, SPI Interface
  • Eight 64-Bit Timers, Three On-Chip PLLs
  • Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.2GHz
    • 153.6 GMAC/76.8 GFLOP @ 1.2GHz
    • 32KB L1P, 32KB L1D, 1024KB L2 Per Core
    • 2MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • Six Lane SerDes-Based Antenna Interface (AIF2) - Operating at up to 6.144 Gbps
  • Hardware Coprocessors
    • -Enhanced Coprocessor for Turbo Encoding
      -Three Enhanced Coprocessors for Turbo Decoding
      -Four Viterbi Decoders
      -Three Fast Fourier Transform Coprocessors
      -Bit Rate CoProcessor
      -Two Receiver Accelerators for WCDMA
      -Transmitt Accelerator for WCDMA
  • Four Rake Search Accelerators for Chip Rate Processing and Reed-Muller Decoding
  • I2C Interface, 16 GPIO Pins, SPI Interface
  • Eight 64-Bit Timers, Three On-Chip PLLs

The TMS320C6670 Multicore Fixed and Floating Point System on Chip is a member of the C66xx SoC family based on TI's new KeyStone Multicore SoC Architecture designed specifically for high performance applications such as software defined radio, emerging broadband and other communications segments. Integrated with four C66x CorePac DSPs, each core runs at 1.0 to 1.20 GHz enabling up to 4.8 GHz. Hardware acceleration provides a highly integrated, power efficient and easy to use platform for implementing a combination of multi-band, multi-standard waveforms, including proprietary air-interfaces. The C6670 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

The TMS320C6670 Multicore Fixed and Floating Point System on Chip is a member of the C66xx SoC family based on TI's new KeyStone Multicore SoC Architecture designed specifically for high performance applications such as software defined radio, emerging broadband and other communications segments. Integrated with four C66x CorePac DSPs, each core runs at 1.0 to 1.20 GHz enabling up to 4.8 GHz. Hardware acceleration provides a highly integrated, power efficient and easy to use platform for implementing a combination of multi-band, multi-standard waveforms, including proprietary air-interfaces. The C6670 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

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技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TMS320C6670 Multicore Fixed and Floating-Point System-on-Chip datasheet (Rev. D) 2012/3/7
* 勘誤表 TMS320C6670 Multicore Fixed and Floating-Point SoC Errata (Revision 1.0, 2.0) (Rev. F) 2014/5/15
應用說明 DDR3 Design Requirements for KeyStone Devices (Rev. D) PDF | HTML 2022/7/7
應用說明 Keystone Error Detection and Correction EDC ECC (Rev. A) 2021/6/25
應用說明 How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A) PDF | HTML 2021/5/19
使用指南 SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) 2020/6/1
應用說明 Keystone Bootloader Resources and FAQ 2019/5/29
應用說明 Keystone Multicore Device Family Schematic Checklist PDF | HTML 2019/5/17
應用說明 Hardware Design Guide for KeyStone Devices (Rev. D) PDF | HTML 2019/3/21
應用說明 Thermal Design Guide for DSP and Arm Application Processors (Rev. B) 2017/8/14
使用指南 Phase-Locked Loop (PLL) for KeyStone Devices User's Guide (Rev. I) 2017/7/26
應用說明 KeyStone I DDR3 Initialization (Rev. E) 2016/10/28
應用說明 Keystone NDK FAQ 2016/10/3
白皮書 A Diverse High Performance Platform for Advanced Driver Assistance System 2016/9/28
應用說明 SERDES Link Commissioning on KeyStone I and II Devices 2016/4/13
白皮書 Multicore SoCs stay a step ahead of SoC FPGAs 2016/2/23
使用指南 Enhanced Direct memory Access 3 (EDMA3) for KeyStone Devices User's Guide (Rev. B) PDF | HTML 2015/5/6
使用指南 Bit Rate Coprocessor (BCP) for KeyStone Devices User's Guide (Rev. A) 2015/4/27
使用指南 Multicore Navigator (CPPI) for KeyStone Architecture User's Guide (Rev. H) PDF | HTML 2015/4/9
使用指南 Antenna Interface 2 (AIF2) for KeyStone I Devices User's Guide (Rev. E) 2015/2/6
使用指南 DDR3 Memory Controller for KeyStone I Devices User's Guide (Rev. E) 2015/1/20
應用說明 TI Keystone DSP PCIe SerDes IBIS-AMI Models 2014/10/9
應用說明 TI Keystone DSP Hyperlink SerDes IBIS-AMI Models 2014/10/9
使用指南 Power Sleep Controller (PSC) for KeyStone Devices User's Guide (Rev. C) 2014/9/4
使用指南 Serial RapidIO (SRIO) for KeyStone Devices User's Guide (Rev. C) 2014/9/3
更多文件說明 KeyStone Lab Manual - Training 2014/6/5
使用指南 System Analyzer User's Guide (Rev. F) 2013/11/18
使用指南 PCI Express (PCIe) for KeyStone Devices User's Guide (Rev. D) 2013/9/30
使用指南 DSP Bootloader for KeyStone Architecture User's Guide (Rev. C) 2013/7/15
白皮書 Accelerating high-performance computing development with Desktop Linux SDK 2013/7/8
使用指南 Gigabit Ethernet Switch Subsystem for KeyStone Devices User's Guide (Rev. D) 2013/7/3
使用指南 Memory Protection Unit (MPU) for KeyStone Devices User's Guide (Rev. A) 2013/6/28
使用指南 C66x CorePac User's Guide (Rev. C) 2013/6/28
使用指南 HyperLink for KeyStone Devices User's Guide (Rev. C) 2013/5/28
使用指南 Security Accelerator (SA) for KeyStone Devices User's Guide (Rev. B) 2013/2/5
應用說明 SerDes Implementation Guidelines for KeyStone I Devices 2012/10/31
應用說明 Multicore Programming Guide (Rev. B) 2012/8/29
使用指南 TMS320C6000 Optimizing Compiler v 7.4 User's Guide (Rev. U) 2012/8/21
使用指南 TMS320C6000 Assembly Language Tools v 7.4 User's Guide (Rev. W) 2012/8/21
使用指南 Packet Accelerator (PA) for KeyStone Devices User's Guide (Rev. A) 2012/7/11
使用指南 Semaphore2 Hardware Module for KeyStone Devices User's Guide (Rev. A) 2012/4/24
使用指南 Serial Peripheral Interface (SPI) for KeyStone Devices User’s Guide (Rev. A) 2012/3/30
使用指南 Chip Interrupt Controller (CIC) for KeyStone Devices User's Guide (Rev. A) 2012/3/27
使用指南 64-Bit Timer (Timer64) for KeyStone Devices User's Guide (Rev. A) 2012/3/22
白皮書 Maximizing Multicore Efficiency with Navigator Runtime 2012/2/23
使用指南 Fast Fourier Transform Coprocessor (FFTC) for KeyStone Devices User's Guide (Rev. C) 2011/12/20
應用說明 PCIe Use Cases for KeyStone Devices 2011/12/13
使用指南 Multicore Shared Memory Controller (MSMC) for KeyStone Devices User's Guide (Rev. A) 2011/10/15
應用說明 Introduction to TMS320C6000 DSP Optimization 2011/10/6
使用指南 Debug and Trace for KeyStone I Devices User's Guide (Rev. A) 2011/9/22
使用指南 Inter-Integrated Circuit (I2C) for KeyStone Devices User's Guide 2011/9/2
白皮書 KeyStone Multicore SoC Tool Suite: one platform for all needs 2011/6/17
使用指南 Viterbi-Decoder Coprocessor 2 (VCP2) for KeyStone Devices User's Guide (Rev. A) 2011/6/10
Product overview TMS320C6670 Breakthrough Performance for Process-Intensive Applications (Rev. B) 2011/6/9
應用說明 TMS320C66x DSP Generation of Devices (Rev. A) 2011/4/25
應用說明 Tuning VCP2 and TCP2 Bit Error Rate Performance 2011/2/11
白皮書 KeyStone Memory Architecture White Paper (Rev. A) 2010/12/21
使用指南 Turbo Decoder Coprocessor 3 (TCP3D) for KeyStone Devices User's Guide 2010/11/18
應用說明 Optimizing Loops on the C66x DSP 2010/11/9
使用指南 General-Purpose Input/Output (GPIO) forKeyStone Devices User's Guide 2010/11/9
應用說明 Migrating From AIF1 to AIF2 for KeyStone Devices 2010/11/9
使用指南 Turbo Encoder Coprocessor 3 (TCP3E) for KeyStone Devices User's Guide 2010/11/9
使用指南 C66x CPU and Instruction Set Reference Guide 2010/11/9
應用說明 Clocking Design Guide for KeyStone Devices 2010/11/9
使用指南 Universal Asynchronous Receiver/Transmitter (UART) for KeyStone Devices UG 2010/11/9
應用說明 Connecting AIF to FFTC Guide for KeyStone Devices 2010/11/9
使用指南 C66x DSP Cache User's Guide 2010/11/9
使用指南 Network Coprocessor for KeyStone Devices User's Guide 2010/11/2

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子卡

SHELD-3P-DSP-SOMS — Sheldon DSP-FPGA 主機板

Sheldon Instruments designs and manufactures DSP based, COTS data acquisition and control hardware for PCIe/PCI, PCI104e/PCI104, XMC/PMC, and CompactPCI systems, along with drivers and real time development software for a variety of applications and markets.

Learn more about Sheldon Instruments at (...)
從：Sheldon Instruments, Inc.
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偵錯探測器

TMDSEMU200-U — XDS200 USB 偵錯探測器

XDS200 是為 TI 嵌入式裝置偵錯的偵錯探測器（模擬器）。對於大多數裝置，建議使用較新、成本較低的 XDS110 (www.ti.com/tool/TMDSEMU110-U)。XDS200 支援單一 Pod 中廣泛的標準（IEEE1149.1、IEEE1149.7、SWD）。所有 XDS 偵錯探針在所有配備嵌入式追蹤緩衝器 (ETB) 的 Arm® 與 DSP 處理器中均支援核心與系統追蹤。

XDS200 透過 TI 20 接腳連接器（配備適用 TI 14 接腳、Arm Cortex® 10 接腳和 Arm 20 接腳的多重轉接器）連接到目標電路板，並透過 USB2.0 高速 (...)

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偵錯探測器

TMDSEMU560V2STM-U — XDS560™ 軟體 v2 系統追蹤 USB 偵錯探測器

XDS560v2 是 XDS560™ 系列偵錯探測器中性能最高的，且同時支援傳統 JTAG 標準 (IEEE1149.1) 與 cJTAG (IEEE1149.7)。  請注意，其不支援序列線偵錯 (SWD)。

所有 XDS 偵錯探測器均在所有配備嵌入式追蹤緩衝器 (ETB) 的 ARM 與 DSP 處理器中支援核心與系統追蹤。  對於針腳上的追蹤，則需要 XDS560v2 PRO TRACE。

XDS560v2 透過 MIPI HSPT 60 針腳接頭 (具有用於 TI 14 針腳、TI 20 針腳和 ARM 20 針腳的多轉接器) 連接到目標電路板，並透過 USB2.0 高速 (...)

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偵錯探測器

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB 與乙太網路偵錯探測器

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

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偵錯探測器

LB-3P-TRACE32-DSP — 適用於數位訊號處理器 (DSP) 的 Lauterbach TRACE32 偵錯和追蹤系統

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of single- or multi-core Digital Signal processors (DSPs) which are a popular choice for audio and video processing as well as radar data (...)

從：Lauterbach GmbH
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介面轉接器

HL5CABLE — Hyperlink 電纜

A ½ meter long high speed cable to allow interfacing 2 EVMs via their high performance Hyperlink interfaces. EVMs supported are TMDSEVM6670L, TMDSEVM6678L, TMDSEVM6670LE, TMDSEVM6678LE, TMDSEVM6614LXE and TMDSEVM6618LXE.
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介面轉接器

TMDXEVMPCI — AMC 至 PCIe 轉接卡

This is a passive adapter card that allows select TI EVMs with a AMC header to be converted to a PCIe x4 lane edge connector so it can be inserted into a desktop PC or any where a PCIe header is utilized. The selected TI EVM must support native PCIe on the DSP. This card is a adapter and requires (...)
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軟體開發套件 (SDK)

BIOSMCSDK-C66X — SYS/BIOS MCSDK for C66x

NOTE: K2x, C665x and C667x devices are now actively maintained on the Processor-SDK release stream. See links above.

Our Multicore Software Development Kits (MCSDK) provide highly-optimized bundles of foundational, platform-specific drivers to enable development on selected TI ARM and DSP devices. (...)

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軟體開發套件 (SDK)

LINUXMCSDK — Linux MCSDK for C66x, C647x and C645x

NOTE: K2x, C665x and C667x devices are now actively maintained on the Processor-SDK release stream. See links above.

Our Multicore Software Development Kits (MCSDK) provide highly-optimized bundles of foundational, platform-specific drivers to enable development on selected TI ARM and DSP devices. (...)

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IDE、配置、編譯器或偵錯程式

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

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驅動程式或資料庫

FFTLIB — 適用於浮點裝置的 FFT 函式庫

The Texas Instruments FFT library is an optimized floating-point math function library for computing the discrete Fourier transform (DFT).

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驅動程式或資料庫

MATHLIB — 用於浮點裝置的 DSP 數學函式庫

The Texas Instruments math library is an optimized floating-point math function library for C programmers using TI floating point devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines instead (...)
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驅動程式或資料庫

SPRC264 — TMS320C5000/6000 映像庫 (IMGLIB)

C5000 6000 影像處理庫 (IMGLIB) 是適合 C 程式設計工具的最佳化影像/影片處理函式庫。此函式庫包括 C 可呼叫通用影像/影片處理常式，這些常式通常用於運算密集型即時應用。相較於同等標準 ANSI C 語言程式碼，使用這些常式可以實現更高性能。IMGLIB 透過立即可用的 DSP 功能與原始程式碼，能夠大幅縮短應用程式開發時間。

查看基準測試：DSP 核心基準測試

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驅動程式或資料庫

SPRC265 — TMS320C6000 DSP 函式庫 (DSPLIB)

TMS320C6000 數位訊號處理器函式庫 (DSPLIB) 是適合 C 編程人員的平台最佳化 DSP 函式庫。此函式庫包括可呼叫 C 語言的通用訊號處理常式，通常用於運算密集的即時應用。相較於同等標準 ANSI C 語言程式碼，使用這些常式可以實現更高性能。DSPLIB 透過立即可用的 DSP 功能與原始程式碼，能夠大幅縮短應用程式開發時間。

查看基準測試：DSP 核心基準測試

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驅動程式或資料庫

TELECOMLIB — 電信和媒體庫 - 用於 TMS320C64x+ 和 TMS320C55x 處理器的 FAXLIB、VoLIB 和 AEC/AER

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

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軟體轉碼器

C66XCODECS — 轉碼器 - 視訊、語音 - 適用於 C66x 架構產品

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. In many cases, the C64x+ codecs are provided and validated for C66x platforms. Datasheets and Release Notes are on the download (...)

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模擬型號

C6670 Power Consumption Model

SPRM546.ZIP (56 KB) - 功率模型
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模擬型號

KeyStone I SerDes IBIS AMI Models

SPRM742.ZIP (969314 KB) - IBIS 模型
lock = 需要匯出核准 (1 分鐘)
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模擬型號

TMS320C6670 CYP BSDL Model (Silicon Revision 1.0) (Rev. A)

SPRM531A.ZIP (22 KB) - BSDL 模型
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模擬型號

TMS320C6670 CYP BSDL Model (Silicon Revision 2.0)

SPRM566.ZIP (22 KB) - BSDL 模型
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模擬型號

TMS320C6670 CYP IBIS Model (Rev. C)

SPRM533C.ZIP (2049 KB) - IBIS 模型
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模擬型號

TMS320C6670 Thermal Model

SPRR181.ZIP (3 KB) - 熱模型
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參考設計

TIDEP0011 — 具有動態電壓調節的 C667x DSP AVS 核心 (CVDD) 電源解決方案

此參考設計旨在為 Keystone 多核 DSP（主要是 C66x 系列）中的 AVS 內核電源 (CVDD) 供電。C66x 系列使用 SmartReflex 技術使 DSP 能夠控制其電源電壓。為了滿足此要求，此設計將同步降壓轉換器 (TPS56121) 與 POL 的電壓編程器 (LM10011) 結合在一起。LM10011 可以接受來自 DSP 的 6 位元或 4 位元 VCNTL，並將 TPS56121 的輸出電壓變更為 DSP 所需的電壓。LM10011 具有高準確度 (1.0%)，可在其餘電源供應元件和配電中增加額外的系統裕度。對於需要特定初始啟動電壓的處理器，LM10011 (...)

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
FCBGA (CYP) 841 Ultra Librarian
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