產品詳細資料

Number of ADC channels 2 Sampling rate (max) (kHz) 96 Analog inputs 6 Control interface I2C Digital audio interface DSP, I2S, L, PCM, R, TDM THD+N (dB) -90 ADC SNR (typ) (dB) 92 Rating Catalog Operating temperature range (°C) -40 to 85 Analog outputs 0
Number of ADC channels 2 Sampling rate (max) (kHz) 96 Analog inputs 6 Control interface I2C Digital audio interface DSP, I2S, L, PCM, R, TDM THD+N (dB) -90 ADC SNR (typ) (dB) 92 Rating Catalog Operating temperature range (°C) -40 to 85 Analog outputs 0
VQFN (RGE) 24 16 mm² 4 x 4
  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to
      96 kHz
  • Instruction-Programmable Embedded miniDSP
  • Flexible Digital Filtering With RAM Programmable
    Coefficient, Instructions, and Built-In Processing
    Blocks
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Additional Programmable IIR Filters for EQ,
      Noise Cancellation or Reduction
    • Up to 128 Programmable ADC Digital Filter
      Coefficients
  • Six Audio Inputs With Configurable Automatic
    Gain Control (AGC)
    • Programmable in Single-Ended or Fully
      Differential Configurations
    • Can Be 3-Stated for Easy Interoperability With
      Other Audio ICs
  • Low Power Consumption and Extensive Modular
    Power Control:
    • 6-mW Mono Record, 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Dual Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/Right-
    Justified, DSP, PCM, and TDM Modes
  • Digital Microphone Input Support
  • Two GPIOs
  • Power Supplies:
    • Analog: 2.6 V to 3.6 V
    • Digital: Core: 1.65 V to 1.95 V,
      I/O: 1.1 V–3.6 V
  • 4-mm × 4-mm 24-Pin RGE (VQFN)
  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to
      96 kHz
  • Instruction-Programmable Embedded miniDSP
  • Flexible Digital Filtering With RAM Programmable
    Coefficient, Instructions, and Built-In Processing
    Blocks
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Additional Programmable IIR Filters for EQ,
      Noise Cancellation or Reduction
    • Up to 128 Programmable ADC Digital Filter
      Coefficients
  • Six Audio Inputs With Configurable Automatic
    Gain Control (AGC)
    • Programmable in Single-Ended or Fully
      Differential Configurations
    • Can Be 3-Stated for Easy Interoperability With
      Other Audio ICs
  • Low Power Consumption and Extensive Modular
    Power Control:
    • 6-mW Mono Record, 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Dual Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/Right-
    Justified, DSP, PCM, and TDM Modes
  • Digital Microphone Input Support
  • Two GPIOs
  • Power Supplies:
    • Analog: 2.6 V to 3.6 V
    • Digital: Core: 1.65 V to 1.95 V,
      I/O: 1.1 V–3.6 V
  • 4-mm × 4-mm 24-Pin RGE (VQFN)

The TLV320ADC3101 device is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101 ideal for battery-powered portable equipment.

The AGC programs to a wide range of attack (7 ms to 1.4 s) and decay (50 ms to 22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

The TLV320ADC3101 device is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101 ideal for battery-powered portable equipment.

The AGC programs to a wide range of attack (7 ms to 1.4 s) and decay (50 ms to 22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

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技術文件

star =TI 所選的此產品重要文件
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重要文件 類型 標題 格式選項 日期
* Data sheet TLV320ADC3101 Low-Power Stereo ADC With Embedded miniDSP for Wireless Handsets and Portable Audio datasheet (Rev. B) PDF | HTML 2015年 8月 31日
Application note Audio Serial Interface Configurations for Audio Codecs (Rev. A) 2019年 6月 27日
Application note Synchronizinging Multiple Parallel Devices Using the Internal PLL (Rev. A) 2019年 1月 2日
Application note Common Noise Issues in Audio Codecs 2017年 7月 21日
Application note Coefficient RAM Access Mechanisms.. (Rev. D) 2012年 1月 25日
Application note Audio Serial Interface Configurations for Audio Codecs 2010年 9月 22日
Application note Configure the coefficients for Digital Biquad Filters in TLV320AIC3xxx family 2010年 4月 27日
Application note Interfacing an I2S Device to an MSP430 Device (Rev. A) 2010年 3月 22日
Application note Using TLV320AIC3x Digital Audio Data Serial Interface w/TDM Support 2006年 7月 5日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TLV320ADC3101EVM-K — TLV320ADC3101 評估模組和 USB 主機板

TLV320ADC3101EVM 採用德州儀器 (TI) 模組化 EVM 外型尺寸,可直接評估裝置性能和運作特性,並簡化軟體開發和系統原型設計。TLV320ADC3101EVM-K 是一套完整的評估/展示套件,包括稱為 USB-MODEVM 介面電路板的 USB 主機板和評估軟體,可與執行 Microsoft Windows 作業系統的個人電腦 (PC) 搭配使用。TLV320ADC3101EVM-K 只需一條連接至 PC 的 USB 纜線即可運作。透過 USB 連接,就能為 EVM 供電、控制及串流音訊資料至 EVM,減少設定與配置作業。EVM (...)

使用指南: PDF
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驅動程式或資料庫

TLV320ADC31XX-DRIVERS — TLV320ADC31XX ADC 系列 Linux 驅動程序支持

這些 Linux 驅動程式支援我們 TLV320AIC2x 裝置系列中的低功率音訊轉碼器,並包含 .c 和 .h 檔案。您可以使用下方的「前往第三方廠商」按鈕從 git.kernal.org 下載適當的驅動程式。

Linux 主線路狀態
在 Linux 主線路中可用:是
可透過 git.ti.com 取得:不適用


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請執行以下任一操作

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IDE、配置、編譯器或偵錯程式

PUREPATHSTUDIO PurePath™ Studio graphical development environment

PurePath™ Studio Graphical Development Environment is a powerful, easy-to-use tool designed specifically to simplify software development for Audio products with a miniDSP/ Audio Processing capability.

The GDE permits these devices to be programmed to support the processing requirements of a wide (...)

支援產品和硬體

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支援軟體

SBAC293 TLV320ADC310x C Source Headers

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模擬型號

TLV320ADC3101 IBIS Model

SLAM171.ZIP (144 KB) - IBIS Model
計算工具

COEFFICIENT-CALC Coefficient Calculator For Digital Biquad Filters

COEFFICIENT-CALC (TIBQ) calculates the coefficients for the digital filter biquad transfer function implemented in TI audio codecs. The characteristics of the digital filter are adjusted by selecting a filter type and moving a control point within a window that shows the transfer function gain and (...)

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計算工具

SLAR163 Audio CODEC/ADC PLL Calculator

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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
參考設計

TIDA-01589 — 具備雜訊消除與回波抵銷功能的高保真、近場雙向音訊參考設計

人機互動需要聲學介面,以提供全雙工免手持通訊。在免手持模式下,來自喇叭的部分遠端或近端音訊訊號會耦合至麥克風。此外,在雜訊環境中,除了可擷取有用的近端音訊訊號外,麥克風還會擷取環境雜訊。擷取的多麥克風音訊訊號會受到聲學背景雜訊及回波訊號破壞,這些訊號會大幅降低所需訊號的清晰度,並限制後續音訊處理系統的性能。此參考設計展示了雙麥克風,其用於透過立體聲 ADC 實現音訊輸入,透過低功耗 DSP 執行雜訊降低、聲音回波消除和其他音訊品質強化演算法。此設計還採用了 TI 智慧型放大器技術,可透過微型喇叭實現高品質、高 SPL 音訊輸出。
Design guide: PDF
電路圖: PDF
參考設計

BT-MSPAUDSOURCE-RD — 藍牙和 MSP MCU 音訊來源參考設計

The Bluetooth and low-power MSP microcontroller Audio Source reference design can be used by customers to create a variety of applications for low-end, low-power audio source solutions for applications including toys, projectors, smart remotes and any audio streaming accessories. This reference (...)
使用指南: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGE) 24 Ultra Librarian

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  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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