SBAC293 — TLV320ADC310x C Source Headers
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音訊 ADC
- TLV320ADC3100 — 適用於聲控系統和可攜式音訊系統的低功耗立體聲類比轉數位轉換器 (ADC)
- TLV320ADC3101 — 具數位麥克風支援和 miniDSP 的 92-dB SNR 低功耗立體聲道 ADC
The TLV320ADC3100 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier (PGA) providing up to 40-dB analog gain or automatic gain control (AGC). Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. The TLV320ADC3100 integrates programable channel gain, digital volume control, a phase-locked loop (PLL), programmable biquad filters, and low latency filter modes. Pre-programmed built-in processing blocks (PRBs) that can be chosen based on the specific application needs, allows optimization of performance and power. Low power consumption coupled with its flexibility make the TLV320ADC3100 ideal for battery-powered portable equipment. The TLV320ADC3100 is form-factor and software compatible with the TLV320ADC3101.
The AGC programs to a wide range of attack (7 ms to 1.4 s) and decay (50 ms to 22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency interrupt identification register (IIR) filters optimized for voice and telephony are available, as well as linear-phase finite impulse response (FIR) filters optimized for audio. Programmable IIR filters are also available and can be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, digital signal processor (DSP), pulse code modulation (PCM), and time-division multiplexing (TDM) modes. The audio bus can be operated in either master or slave mode.
A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TLV320ADC3100 Low-Power Stereo ADC for Voice-Activated Systems and Portable Audio datasheet | PDF | HTML | 2018年 3月 28日 |
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TLV320ADC3101EVM 採用德州儀器 (TI) 模組化 EVM 外型尺寸,可直接評估裝置性能和運作特性,並簡化軟體開發和系統原型設計。TLV320ADC3101EVM-K 是一套完整的評估/展示套件,包括稱為 USB-MODEVM 介面電路板的 USB 主機板和評估軟體,可與執行 Microsoft Windows 作業系統的個人電腦 (PC) 搭配使用。TLV320ADC3101EVM-K 只需一條連接至 PC 的 USB 纜線即可運作。透過 USB 連接,就能為 EVM 供電、控制及串流音訊資料至 EVM,減少設定與配置作業。EVM (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGE) | 24 | Ultra Librarian |
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。