SN74LVC1G18
- Operating temperature from –40°C to +125°C
- Supports 5-V VCC operation
- Inputs accept voltages to 5.5 V
- Supports down translation to VCC
- Max tpd of 3.4 ns at 3.3 V
- Low power consumption, 10-µA max ICC
- ±24-mA Output drive at 3.3 V
- Typical VOLP (output ground bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (output VOH undershoot)
>2 V at VCC = 3.3 V, TA = 25°C - Ioff Supports live insertion, partial-power-down mode, and back-drive protection
- Latch-up performance exceeds 100 mA
Per JESD 78, Class II - ESD protection exceeds JESD 22
- 2000-V Human-body model (A114-A)
- 200-V machine model (A115-A)
- 1000-V Charged-device model (C101)
This non-inverting demultiplexer is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G18 device is a 1-of-2 non-inverting demultiplexer with a 3-state output. This device buffers the data on input A and passes it to either output Y0 or Y1, depending on whether the state of the select (S) input is low or high, respectively.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74LVC1G18 1-of-2 Noninverting Demultiplexer With 3-State Deselected Output datasheet (Rev. L) | PDF | HTML | 2019/8/19 |
設計與開發
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5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組
5-8-NL-LOGIC-EVM — 支援 5 至 8 針腳 DPW、DQE、DRY、DSF、DTM、DTQ 和 DTT 封裝的通用邏輯和轉譯 EVM
支援任何具 DTT、DRY、DPW、DTM、DQE、DQM、DSF 或 DTQ 封裝的邏輯或轉換裝置之通用 EVM。可實現靈活評估的電路板設計。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| X2SON (DSF) | 6 | Ultra Librarian |
| SOT-23 (DBV) | 6 | Ultra Librarian |
| SOT-SC70 (DCK) | 6 | Ultra Librarian |
| USON (DRY) | 6 | Ultra Librarian |
| DSBGA (YZP) | 6 | Ultra Librarian |