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正反器、鎖存器和暫存器
移位暫存器

SN74HCS595

現行

具有施密特觸發器輸入和三態輸出暫存器的 8 位元移位暫存器

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產品規格表

SN74HCS595

現行
產品規格表 立即訂購

產品詳細資料

Configuration Serial-in, Parallel-out Bits (#) 8 Technology family HCS Input type Schmitt-Trigger Output type 3-State Clock frequency (MHz) 75 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Catalog
Configuration Serial-in, Parallel-out Bits (#) 8 Technology family HCS Input type Schmitt-Trigger Output type 3-State Clock frequency (MHz) 75 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Catalog
SOT-23-THN (DYY) 16 8.4 mm² (4.2 mm × 2 mm) TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) WQFN (BQB) 16 8.75 mm² (3.5 mm × 2.5 mm)
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA

The SN74HCS595 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of the OE input.

The SN74HCS595 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of the OE input.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SN74HCS595 8-Bit Shift Register With Schmitt-Trigger Inputs and 3-State Output Registers datasheet (Rev. B) PDF | HTML 2021/5/25
Application brief Using Linear Interpolation to Estimate Specification Values PDF | HTML 2026/4/13
Application brief Optimizing Electric Toothbrushes and Other Personal Care Devices with Logic PDF | HTML 2023/7/13
Application brief Optimizing Industrial Robot CPU Boards with Logic and Voltage Translation PDF | HTML 2022/12/12
Application brief Optimizing WLAN and WiFi Access Point Systems With Logic and Voltage Translation PDF | HTML 2022/11/3
應用說明 Designing with Shift Registers PDF | HTML 2022/7/14
Application brief Enabling Small Ruggedized Applications with Next-Generation Leaded Logic IC Pkg PDF | HTML 2022/2/4
Application brief Overcoming Last-Minute Feature Creep with Modern Shift Registers PDF | HTML 2020/11/3
應用說明 Increase the Number of Outputs on a Microcontroller PDF | HTML 2020/10/27
Application brief Driving Indicator LEDs 2020/10/15
技術文章 New logic family enables noise-tolerant and lower-power system designs PDF | HTML 2019/11/12

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14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。

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14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM)，設計用於支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。

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模擬型號

SN74HCS595 IBIS Model (Rev. C)

SCLM163C.ZIP (253 KB) - IBIS 模型
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SOT-23-THN (DYY) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian
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