SN74AC596-Q1

現行

車用 1.5V 至 6.0V 8 位元序列輸入平行輸出移位暫存器

產品詳細資料

Configuration Serial-in Bits (#) 8 Technology family AC Input type Standard CMOS Output type Open-drain Clock frequency (MHz) 92 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Automotive
Configuration Serial-in Bits (#) 8 Technology family AC Input type Standard CMOS Output type Open-drain Clock frequency (MHz) 92 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Automotive
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) WQFN (BQB) 16 8.75 mm² (3.5 mm × 2.5 mm)
  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1: -40°C to +125°C
    • Device HBM ESD classification level 2
    • Device CDM ESD classification level C4B
  • Available in wettable flank QFN package
  • Wide operating range of 1.5V to 6V
  • Inputs accept voltages up to 6V
  • Continuous ±24mA output drive at 5V
  • Supports up to ±75mA output drive at 5Vin short bursts
  • Drives 50Ω transmission lines
  • Maximum tpd of 11.4ns at 5V, 50pF load
  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1: -40°C to +125°C
    • Device HBM ESD classification level 2
    • Device CDM ESD classification level C4B
  • Available in wettable flank QFN package
  • Wide operating range of 1.5V to 6V
  • Inputs accept voltages up to 6V
  • Continuous ±24mA output drive at 5V
  • Supports up to ±75mA output drive at 5Vin short bursts
  • Drives 50Ω transmission lines
  • Maximum tpd of 11.4ns at 5V, 50pF load

The SN74AC596-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the outputs are in a high-impedance state. Internal register data is not impacted by the operation of the OE input.

The SN74AC596-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the outputs are in a high-impedance state. Internal register data is not impacted by the operation of the OE input.

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* 資料表 SN74AC596-Q1 Automotive 8-Bit Shift Register With Open-Drain Output Registers datasheet PDF | HTML 2024/11/7

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TSSOP (PW) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian

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