產品詳細資料

Protocols Analog Configuration Crosspoint/exchange Number of channels 10 Bandwidth (MHz) 200 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 8 CON (typ) (pF) 18.5 OFF-state leakage current (max) (µA) 10 Ron (max) (mΩ) 12000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration Crosspoint/exchange Number of channels 10 Bandwidth (MHz) 200 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 8 CON (typ) (pF) 18.5 OFF-state leakage current (max) (µA) 10 Ron (max) (mΩ) 12000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
SSOP (DBQ) 24 51.9 mm² (8.65 mm × 6 mm) TSSOP (PW) 24 49.92 mm² (7.8 mm × 6.4 mm) SOIC (DW) 24 159.65 mm² (15.5 mm × 10.3 mm)
  • Undershoot protection for off-isolation on A and B ports up to −2 V
  • Bidirectional data flow, with near-zero propagation delay
  • Low on-state resistance (ron) characteristics (ron = 3 Ω typical)
  • Low input output capacitance minimizes loading and signal distortion (Cio (OFF) = 8 pF typical)
  • Data and control inputs provide undershoot clamp diodes
  • Low power consumption (ICC = 3 µA maximum)
  • VCC operating range from 4 V to 5.5 V data I/Os support 0 to 5-V signaling levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V)
  • Control inputs can be driven by TTL or 5-V/3.3-V CMOS outputs
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD performance tested per JESD 22− 2000-V Human-Body Model (A114-B, Class II)− 1000-V Charged-Device Model (C101)
  • Supports both digital and analog applications: PCI interface, memory interleaving, bus isolation, low-distortion signal gating
  • Undershoot protection for off-isolation on A and B ports up to −2 V
  • Bidirectional data flow, with near-zero propagation delay
  • Low on-state resistance (ron) characteristics (ron = 3 Ω typical)
  • Low input output capacitance minimizes loading and signal distortion (Cio (OFF) = 8 pF typical)
  • Data and control inputs provide undershoot clamp diodes
  • Low power consumption (ICC = 3 µA maximum)
  • VCC operating range from 4 V to 5.5 V data I/Os support 0 to 5-V signaling levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V)
  • Control inputs can be driven by TTL or 5-V/3.3-V CMOS outputs
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD performance tested per JESD 22− 2000-V Human-Body Model (A114-B, Class II)− 1000-V Charged-Device Model (C101)
  • Supports both digital and analog applications: PCI interface, memory interleaving, bus isolation, low-distortion signal gating

The SN74CBT3383C is a high-speed TTL-compatible FET bus-exchange switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3383C provides protection for undershoot up to −2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT3383C is organized as a 10-bit bus switch, or as a 5-bit bus-exchange switch with a single output-enable (BE) input that provides data exchanging between four signal ports. The select (BX) input controls the data path of the bus-exchange switch. When BE is low, the A port is connected to the B port, allowing bidirectional data flow between ports. When BE is high, a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, BE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBT3383C is a high-speed TTL-compatible FET bus-exchange switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3383C provides protection for undershoot up to −2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT3383C is organized as a 10-bit bus switch, or as a 5-bit bus-exchange switch with a single output-enable (BE) input that provides data exchanging between four signal ports. The select (BX) input controls the data path of the bus-exchange switch. When BE is low, the A port is connected to the B port, allowing bidirectional data flow between ports. When BE is high, a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, BE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SN74CBT3383C 10-Bit FET Bus-Exchange Switch 5-V Bus SwitchWith −2-V Undershoot Protection datasheet (Rev. A) PDF | HTML 2022/12/2
應用說明 Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022/6/2
應用說明 Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021/12/1
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021/1/6

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