產品詳細資料

Protocols Analog, I2C, UART Configuration 1:1 SPST Number of channels 2 Bandwidth (MHz) 500 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Supply current (typ) (µA) 250 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 64 COFF (typ) (pF) 3.5 CON (typ) (pF) 8 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 9000 VIH (min) (V) 1.7 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog, I2C, UART Configuration 1:1 SPST Number of channels 2 Bandwidth (MHz) 500 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Supply current (typ) (µA) 250 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 64 COFF (typ) (pF) 3.5 CON (typ) (pF) 8 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 9000 VIH (min) (V) 1.7 VIL (max) (V) 0.8 Rating Catalog
TSSOP (PW) 8 19.2 mm² (3 mm × 6.4 mm) VSSOP (DCU) 8 6.2 mm² (2 mm × 3.1 mm)
  • High-bandwidth data path (up to 500 MHz)(1)
  • 5-V tolerant I/Os with device powered up or powered down
  • Low and flat ON-state resistance (ron) characteristics over operating range (ron = 3 Ω typical)
  • Supports input voltage beyond supply on data I/O ports
    • 0 to 5 V switching with 3.3 V VCC
    • 0 to 3.3 V switching with 2.5 V VCC
  • Bidirectional data flow with near-zero propagation delay
  • Low input or output capacitance minimizes loading and signal distortion (Cio(OFF) = 3.5 pF typical)
  • Fast switching frequency (fOE = 20 MHz maximum)
  • Data and control inputs provide undershoot clamp diodes
  • Low power consumption (ICC = 0.25 mA typical)
  • VCC operating range from 2.3 V to 3.6 V
  • Data I/Os support 0 to 5 V signaling levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V)
  • Control inputs can be driven by TTL or 5 V/3.3 V CMOS outputs
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II

(1)For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families, SCDA008.

  • High-bandwidth data path (up to 500 MHz)(1)
  • 5-V tolerant I/Os with device powered up or powered down
  • Low and flat ON-state resistance (ron) characteristics over operating range (ron = 3 Ω typical)
  • Supports input voltage beyond supply on data I/O ports
    • 0 to 5 V switching with 3.3 V VCC
    • 0 to 3.3 V switching with 2.5 V VCC
  • Bidirectional data flow with near-zero propagation delay
  • Low input or output capacitance minimizes loading and signal distortion (Cio(OFF) = 3.5 pF typical)
  • Fast switching frequency (fOE = 20 MHz maximum)
  • Data and control inputs provide undershoot clamp diodes
  • Low power consumption (ICC = 0.25 mA typical)
  • VCC operating range from 2.3 V to 3.6 V
  • Data I/Os support 0 to 5 V signaling levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V)
  • Control inputs can be driven by TTL or 5 V/3.3 V CMOS outputs
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II

(1)For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families, SCDA008.

The SN74CB3Q3305 device is a high-bandwidth FET bus switch using a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports switching input voltage beyond the supply on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3305 device provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN74CB3Q3305 device is a high-bandwidth FET bus switch using a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports switching input voltage beyond the supply on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3305 device provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SN74CB3Q3305 Dual FET Bus Switch 2.5-V or 3.3-V Low-Voltage High-Bandwidth Bus Switch datasheet (Rev. D) PDF | HTML 2021/9/15
應用說明 Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022/6/2
應用說明 Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021/12/1
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021/1/6

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開發板

DIP-ADAPTER-EVM — DIP 轉接器評估模組

Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.

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介面轉接器

LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器

EVM-LEADED1 板可用於快速測試和搭建 TI 常見的有引腳封裝  此電路板具備板上配置,可將 TI 的 D、DBQ、DCT、DCU、DDF、DGS、DGV 和 PW 表面黏著封裝轉換為 100mil DIP 排針。     

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模擬型號

SN74CB3Q3305 IBIS Model

SCDM050.ZIP (24 KB) - IBIS 模型
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TSSOP (PW) 8 Ultra Librarian
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