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Real-time motor control & automation MCUs

SM320F2812-HT

現行

具 150 MHz、256 KB 快閃記憶體、EMIF 的 C2000™ 高溫 32 位元 MCU

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SM320F2812-HT

現行
產品規格表 立即訂購

產品詳細資料

CPU C28x Frequency (MHz) 150 Flash memory (kByte) 256 RAM (kByte) 36 ADC type 1 12-bit SAR Features 2-pin oscillator, CAN, CPU timers, External memory interface, McBSP, Military qualified, SPI, Single zone code security, UART, Watchdog timer UART 2 CAN (#) 1 PWM (Ch) 16 SPI 1 Operating temperature range (°C) -55 to 220 Rating High Temp Communication interface CAN, McBSP, SPI, UART Hardware accelerators CPU only Edge AI enabled Yes Nonvolatile memory (kByte) 256 Number of GPIOs 56
CPU C28x Frequency (MHz) 150 Flash memory (kByte) 256 RAM (kByte) 36 ADC type 1 12-bit SAR Features 2-pin oscillator, CAN, CPU timers, External memory interface, McBSP, Military qualified, SPI, Single zone code security, UART, Watchdog timer UART 2 CAN (#) 1 PWM (Ch) 16 SPI 1 Operating temperature range (°C) -55 to 220 Rating High Temp Communication interface CAN, McBSP, SPI, UART Hardware accelerators CPU only Edge AI enabled Yes Nonvolatile memory (kByte) 256 Number of GPIOs 56
CFP (HFG) 172 888.338025 mm² 29.805 x 29.805 DIESALE (KGD) — See data sheet
  • High-Performance Static CMOS Technology
    • 150 MHz (6.67 ns Cycle Time)
    • Low Power (1.8 V Core at 135 MHz, 1.9 V, Core at 150 MHz, 3.3 V I/O) Design
    • 3.3 V Flash Voltage
  • JTAG Boundary Scan SupportIEEE Standard 1149.1-1990, IEEE Standard Test-Access Port
  • High-Performance 32 Bit CPU (TMS320C28x)
    • 16 × 16 and 32 x 32 MAC Operations
    • 16 × 16 Dual MAC
    • Harvard Bus Architecture
    • Atomic Operations
    • Fast Interrupt Response and Processing
    • Unified Memory Programming Model
    • 4M Linear Program Address Reach
    • 4M Linear Data Address Reach
    • Code-Efficient (in C/C++ and Assembly)
    • TMS320F24x/LF240x Processor Source Code Compatible
  • On-Chip Memory
    • Flash Devices: Up to 128K × 16 Flash (Four 8K × 16 and Six 16K × 16 Sectors)
    • ROM Devices: Up to 128K × 16 ROM
    • 1K × 16 OTP ROM
    • L0 and L1: 2 Blocks of 4K × 16 Each Single-Access RAM (SARAM)
    • H0: 1 Block of 8K × 16 SARAM
    • M0 and M1: 2 Blocks of 1K × 16 Each SARAM
  • Boot ROM (4K × 16)
    • With Software Boot Modes
    • Standard Math Tables
  • External Interface
    • Up to 1M Total Memory
    • Programmable Wait States
    • Programmable Read/Write Strobe Timing
    • Three Individual Chip Selects
  • Clock and System Control
    • Dynamic PLL Ratio Changes Supported
    • On-Chip Oscillator
    • Watchdog Timer Module
  • Three External Interrupts
  • Peripheral Interrupt Expansion (PIE) Block That Supports 45 Peripheral Interrupts
  • 128 Bit Security Key/Lock
    • Protects Flash/ROM/OTP and L0/L1 SARAM
    • Prevents Firmware Reverse Engineering
  • Three 32 Bit CPU Timers
  • Motor Control Peripherals
    • Two Event Managers (EVA, EVB)
    • Compatible to 240xA Devices
  • Serial Port Peripherals
    • Serial Peripheral Interface (SPI)
    • Two Serial Communications Interfaces (SCIs), Standard UART
    • Multichannel Buffered Serial Port (McBSP) With SPI Mode
  • 12 Bit ADC, 16 Channels
    • 2 × 8 Channel Input Multiplexer
    • Two Sample-and-Hold
    • Single/Simultaneous Conversions
    • Fast Conversion Rate: 80 ns/12.5 MSPS
  • Up to 56 Individually Programmable, Multiplexed General-Purpose Input / Output (GPIO) Pins
  • Advanced Emulation Features
    • Analysis and Breakpoint Functions
    • Real-Time Debug via Hardware
  • Development Tools Include
    • ANSI C/C++ Compiler/Assembler/Linker
    • Supports TMS320C24x/240x Instructions
    • Code Composer Studio IDE
    • DSP/BIOS
    • JTAG Scan Controllers [Texas Instruments (TI) or Third-Party]
    • Evaluation Modules
    • Broad Third-Party Digital Motor Control Support
  • Low-Power Modes and Power Savings
    • IDLE, STANDBY, HALT Modes Supported
    • Disable Individual Peripheral Clocks
  • APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extreme (–55°C/220°C) Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
    • Texas Instruments high temperature products utilize highly optimized silicon (die)
      solutions with design and process enhancements to maximize performance over
      extended temperatures.

(1) Custom temperature ranges available
  • High-Performance Static CMOS Technology
    • 150 MHz (6.67 ns Cycle Time)
    • Low Power (1.8 V Core at 135 MHz, 1.9 V, Core at 150 MHz, 3.3 V I/O) Design
    • 3.3 V Flash Voltage
  • JTAG Boundary Scan SupportIEEE Standard 1149.1-1990, IEEE Standard Test-Access Port
  • High-Performance 32 Bit CPU (TMS320C28x)
    • 16 × 16 and 32 x 32 MAC Operations
    • 16 × 16 Dual MAC
    • Harvard Bus Architecture
    • Atomic Operations
    • Fast Interrupt Response and Processing
    • Unified Memory Programming Model
    • 4M Linear Program Address Reach
    • 4M Linear Data Address Reach
    • Code-Efficient (in C/C++ and Assembly)
    • TMS320F24x/LF240x Processor Source Code Compatible
  • On-Chip Memory
    • Flash Devices: Up to 128K × 16 Flash (Four 8K × 16 and Six 16K × 16 Sectors)
    • ROM Devices: Up to 128K × 16 ROM
    • 1K × 16 OTP ROM
    • L0 and L1: 2 Blocks of 4K × 16 Each Single-Access RAM (SARAM)
    • H0: 1 Block of 8K × 16 SARAM
    • M0 and M1: 2 Blocks of 1K × 16 Each SARAM
  • Boot ROM (4K × 16)
    • With Software Boot Modes
    • Standard Math Tables
  • External Interface
    • Up to 1M Total Memory
    • Programmable Wait States
    • Programmable Read/Write Strobe Timing
    • Three Individual Chip Selects
  • Clock and System Control
    • Dynamic PLL Ratio Changes Supported
    • On-Chip Oscillator
    • Watchdog Timer Module
  • Three External Interrupts
  • Peripheral Interrupt Expansion (PIE) Block That Supports 45 Peripheral Interrupts
  • 128 Bit Security Key/Lock
    • Protects Flash/ROM/OTP and L0/L1 SARAM
    • Prevents Firmware Reverse Engineering
  • Three 32 Bit CPU Timers
  • Motor Control Peripherals
    • Two Event Managers (EVA, EVB)
    • Compatible to 240xA Devices
  • Serial Port Peripherals
    • Serial Peripheral Interface (SPI)
    • Two Serial Communications Interfaces (SCIs), Standard UART
    • Multichannel Buffered Serial Port (McBSP) With SPI Mode
  • 12 Bit ADC, 16 Channels
    • 2 × 8 Channel Input Multiplexer
    • Two Sample-and-Hold
    • Single/Simultaneous Conversions
    • Fast Conversion Rate: 80 ns/12.5 MSPS
  • Up to 56 Individually Programmable, Multiplexed General-Purpose Input / Output (GPIO) Pins
  • Advanced Emulation Features
    • Analysis and Breakpoint Functions
    • Real-Time Debug via Hardware
  • Development Tools Include
    • ANSI C/C++ Compiler/Assembler/Linker
    • Supports TMS320C24x/240x Instructions
    • Code Composer Studio IDE
    • DSP/BIOS
    • JTAG Scan Controllers [Texas Instruments (TI) or Third-Party]
    • Evaluation Modules
    • Broad Third-Party Digital Motor Control Support
  • Low-Power Modes and Power Savings
    • IDLE, STANDBY, HALT Modes Supported
    • Disable Individual Peripheral Clocks
  • APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extreme (–55°C/220°C) Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
    • Texas Instruments high temperature products utilize highly optimized silicon (die)
      solutions with design and process enhancements to maximize performance over
      extended temperatures.

(1) Custom temperature ranges available

The SM320F2812 device, member of the C28xE DSP generation, is a highly integrated, high-performance solution for demanding control applications. The functional blocks and the memory maps are described in Section 3, Functional Overview.

Throughout this document SM320F2812 is abbreviated as F2812.

The SM320F2812 device, member of the C28xE DSP generation, is a highly integrated, high-performance solution for demanding control applications. The functional blocks and the memory maps are described in Section 3, Functional Overview.

Throughout this document SM320F2812 is abbreviated as F2812.
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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet Digital Signal Processor. datasheet (Rev. B) 2011年 6月 27日
* Errata SM320F2812-HT AVSSREFBG and AVDDREFBG Die Pad X-Center PDF | HTML 2021年 11月 11日
* Radiation & reliability report SM320F2812HFGS150 Reliability Report 2012年 8月 13日

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偵錯探測器

TMDSEMU200-U — XDS200 USB 偵錯探測器

XDS200 是為 TI 嵌入式裝置偵錯的偵錯探測器（模擬器）。對於大多數裝置，建議使用較新、成本較低的 XDS110 (www.ti.com/tool/TMDSEMU110-U)。XDS200 支援單一 Pod 中廣泛的標準（IEEE1149.1、IEEE1149.7、SWD）。所有 XDS 偵錯探針在所有配備嵌入式追蹤緩衝器 (ETB) 的 Arm® 與 DSP 處理器中均支援核心與系統追蹤。

XDS200 透過 TI 20 接腳連接器（配備適用 TI 14 接腳、Arm Cortex® 10 接腳和 Arm 20 接腳的多重轉接器）連接到目標電路板，並透過 USB2.0 高速 (...)

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TMDSEMU560V2STM-U — XDS560v2 System Trace USB 偵錯探測器

XDS560v2 是 XDS560™ 偵錯探測器系列的最高性能表現，支援傳統 JTAG 標準 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。請注意，序列線偵錯 (SWD) 不受支援。

所有 XDS 偵錯探測器均支援所有具有嵌入式追踪緩衝區 (ETB) 的 ARM 和 DSP 處理器中的核心和系統追蹤功能。對於針腳追蹤則需要 XDS560v2 PRO TRACE。

XDS560v2 透過 MIPI HSPT 60 針腳接頭 (具有用於 TI 14 針腳、TI 20 針腳和 ARM 20 針腳的多轉接器) 連接到目標電路板，並透過 USB2.0 高速 (480Mbps) (...)

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TMDSEMU560V2STM-UE — XDS560v2 System Trace USB 與乙太網路偵錯探測器

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

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C2000-GANG — C2000 Gang 程式設計工具

由 Elprotronics, Inc. 提供：C2000 Gang Programmer 是 C2000 裝置編程器，可同時編程高達八個相同的 C2000 裝置。C2000 Gang Programmer 使用標準 RS-232 或 USB 連線連接到主機 PC，並提供靈活的編程選項，可讓使用者完全自訂過程。

C2000 Gang Programmer 隨附稱為 Gang 分離器的擴充板，能夠讓 C2000 Gang Programmer 和多個目標裝置互連。提供八條電纜，可將擴充板連接至八個目標裝置（透過 JTAG 或 Spy-Bi-Wire 連接器）。編程可透過 PC (...)

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UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

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