LM2104
- Drives two N-channel MOSFETs in half-bridge configuration
- 8-V typical undervoltage lockout on GVDD
- 107-V absolute maximum voltage on BST
- –19.5-V absolute maximum negative transient voltage handling on SH
- 0.5-A/0.8-A peak source/sink currents
- 475-ns typical fixed internal dead-time
- Built-in cross conduction prevention
- 115-ns typical propagation delay
- Shutdown logic input pin SD
- Single input pin IN
The LM2104 is a compact, high-voltage gate driver designed to drive both the high-side and the low-side N-channel MOSFETs in a synchronous buck or a half-bridge configuration. The IN pin allows the device to be used in single PWM input applications, and the SD pin allows the controller to disable the drivers outputs by turning them off when the SD pin is low, regardless of the IN pin state.
The fixed dead-time and the –1-V DC and –19.5-V transient negative voltage handling on the SH pin improve the system robustness in high noise applications. The LM2104 is available in an 8-pin SOIC package compatible with industry standard pinouts. Undervoltage lockout (UVLO) is provided on both the low-side and the high-side power rails for protection during power up and power down.
技術文件
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
LM2X0X-CALC — LM2x0x 電路圖審查範本
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。