TXV0106

활성

듀얼 공급 고정 방향 6채널 전압 변환기

제품 상세 정보

Bits (#) 6 Data rate (max) (Mbps) 500 Topology Push-Pull Direction control (typ) Fixed-direction Vin (min) (V) 1.14 Vin (max) (V) 3.6 Vout (min) (V) 1.14 Vout (max) (V) 3.6 Applications GPIO, JTAG, RGMII, SPI, UART Features Output damping resistors, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc disconnect, Vcc isolation, Wettable flanks package Prop delay (ns) 2.3 Technology family TXV Supply current (max) (mA) 0.022 Rating Catalog Operating temperature range (°C) -40 to 125
Bits (#) 6 Data rate (max) (Mbps) 500 Topology Push-Pull Direction control (typ) Fixed-direction Vin (min) (V) 1.14 Vin (max) (V) 3.6 Vout (min) (V) 1.14 Vout (max) (V) 3.6 Applications GPIO, JTAG, RGMII, SPI, UART Features Output damping resistors, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc disconnect, Vcc isolation, Wettable flanks package Prop delay (ns) 2.3 Technology family TXV Supply current (max) (mA) 0.022 Rating Catalog Operating temperature range (°C) -40 to 125
WQFN (BQB) 16 8.75 mm² (3.5 mm × 2.5 mm)
  • Configurable design allows each port to operate with a power supply range from 1.2 V to 3.6 V

  • Supports up to 500Mbps for 1.65 V to 3.6 V
  • Meets RGMII 2.0 timing specifications:
    • < 750 ps rise and fall time
    • < ± 5 % duty cycle distortion
    • < ± 400 ps channel to channel skew
    • Up to 250Mbps/channel
  • Integrated 10 Ω damping output resistor to minimize signal reflections
  • High drive strength (up to 12 mA at 3.6 V)
  • Fully configurable symmetric dual-rail design
  • Optimal signal integrity performance with 390ps peak-to-peak jitter for 1.8 V to 3.3 V
  • Features VCC isolation and VCC disconnect
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 2000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Low power consumption:
    • 10-µA maximum (25°C)
    • 20-µA maximum (–40°C to 125°C)
  • Operating temperature from –40°C to +125°C
  • Configurable design allows each port to operate with a power supply range from 1.2 V to 3.6 V

  • Supports up to 500Mbps for 1.65 V to 3.6 V
  • Meets RGMII 2.0 timing specifications:
    • < 750 ps rise and fall time
    • < ± 5 % duty cycle distortion
    • < ± 400 ps channel to channel skew
    • Up to 250Mbps/channel
  • Integrated 10 Ω damping output resistor to minimize signal reflections
  • High drive strength (up to 12 mA at 3.6 V)
  • Fully configurable symmetric dual-rail design
  • Optimal signal integrity performance with 390ps peak-to-peak jitter for 1.8 V to 3.3 V
  • Features VCC isolation and VCC disconnect
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 2000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Low power consumption:
    • 10-µA maximum (25°C)
    • 20-µA maximum (–40°C to 125°C)
  • Operating temperature from –40°C to +125°C

The TXV0106 is a 6-bit, dual-supply fixed-direction low-skew, low jitter voltage translation device. This device can be used for redriving, voltage translation and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet MAC and PHY. The Ax I/O pins and enable pin (OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise or fall timing for applications requiring strict timing conditions.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.

The TXV0106 transmits data in a fixed direction from the A bus to the B bus. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

The TXV0106 is a 6-bit, dual-supply fixed-direction low-skew, low jitter voltage translation device. This device can be used for redriving, voltage translation and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet MAC and PHY. The Ax I/O pins and enable pin (OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise or fall timing for applications requiring strict timing conditions.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.

The TXV0106 transmits data in a fixed direction from the A bus to the B bus. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

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기술 자료

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상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 TXV0106 6-Bit Fix Direction Low Skew, Low-Jitter Voltage Translator or Buffer datasheet (Rev. A) PDF | HTML 2024. 4. 12
Application brief Enabling AI Accelerators with Voltage Level Translation and Analog Multiplexing (Rev. A) PDF | HTML 2025. 9. 29
애플리케이션 노트 Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024. 10. 2
애플리케이션 노트 Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024. 7. 12
애플리케이션 노트 Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024. 7. 3
애플리케이션 노트 Overcoming Design Challenges - Implementing High Performance Interfaces PDF | HTML 2023. 12. 12
Application brief Supporting Time and Skew Sensitive Interfaces with TI's TXV Level-Shifter PDF | HTML 2023. 10. 27
Application brief Enabling Industrial and Automotive Ethernet RGMII Interfaces with Voltage Transl PDF | HTML 2023. 8. 2

설계 및 개발

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평가 보드

14-24-NL-LOGIC-EVM — 14핀~24핀 비 리드 패키지용 로직 제품 일반 평가 모듈

14-24-NL-LOGIC-EVM은 14핀~24핀 BQA, BQB, RGY, RSV, RJW 또는 RHL 패키지가 있는 로직 또는 변환 장치를 지원하도록 설계된 유연한 평가 모듈(EVM)입니다.

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평가 보드

TXV0106-EVM — TXV0106 평가 모듈

TXV0106 평가 모듈(EVM)은 TXV0106 장치의 기능 및 성능 평가를 위한 플랫폼으로 사용이 간편합니다. EVM에는 여러 애플리케이션을 위해 장치를 구성할 수 있는 선택적 회로와 점퍼가 있습니다. 이 장치는 고정 및 방향 제어 낮은 스큐, 저지터 전압 변환에 대한 옵션을 제공합니다. 출력은 전용 출력 활성화(OE) 제어 기능을 통해 활성화 및 비활성화할 수 있습니다.
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시뮬레이션 모델

TXV0106 IBIS Model

SCEM797.ZIP (44 KB) - IBIS 모델
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패키지 CAD 기호, 풋프린트 및 3D 모델
WQFN (BQB) 16 Ultra Librarian

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