제품 상세 정보

Resolution (Bits) 10 Sample rate (max) (ksps) 91 Number of input channels 8 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating HiRel Enhanced Product Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 0.95 Analog supply voltage (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.5
Resolution (Bits) 10 Sample rate (max) (ksps) 91 Number of input channels 8 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating HiRel Enhanced Product Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 0.95 Analog supply voltage (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.5
SSOP (DB) 20 56.16 mm² (7.2 mm × 7.8 mm)
  • Controlled Baseline
    • One Assembly Site, One Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • Conversion Time ≤ 10 µs
  • 10-Bit-Resolution ADC
  • Programmable Power-Down Mode . . . 1 µA
  • Wide Range Single-Supply Operation of 2.7 V dc to 5.5 V dc
  • Analog Input Range of 0 V to VCC
  • Built-in Analog Multiplexer with 8 Analog Input Channels
  • TMS320 DSP and Microprocessor SPI and QSPI Compatible Serial Interfaces
  • End-of-Conversion (EOC) Flag
  • Inherent Sample-and-Hold Function
  • Built-In Self-Test Modes
  • Programmable Power and Conversion Rate
  • Asynchronous Start of Conversion for Extended Sampling
  • Hardware I/O Clock Phase Adjust Input

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

SPI and QSPI are registered trademarks of Motorola, Inc.

  • Controlled Baseline
    • One Assembly Site, One Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • Conversion Time ≤ 10 µs
  • 10-Bit-Resolution ADC
  • Programmable Power-Down Mode . . . 1 µA
  • Wide Range Single-Supply Operation of 2.7 V dc to 5.5 V dc
  • Analog Input Range of 0 V to VCC
  • Built-in Analog Multiplexer with 8 Analog Input Channels
  • TMS320 DSP and Microprocessor SPI and QSPI Compatible Serial Interfaces
  • End-of-Conversion (EOC) Flag
  • Inherent Sample-and-Hold Function
  • Built-In Self-Test Modes
  • Programmable Power and Conversion Rate
  • Asynchronous Start of Conversion for Extended Sampling
  • Hardware I/O Clock Phase Adjust Input

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

SPI and QSPI are registered trademarks of Motorola, Inc.

The TLV1548 is a CMOS 10-bit switched-capacitor successive-approximation (SAR) analog-to-digital (A/D) converter. The device has a chip select (CS)\, input-output clock (I/O CLK), data input (DATA IN) and serial data output (DATA OUT) that provides a direct 4-wire synchronous serial peripheral interface (SPI™, QSPI™) port of a host microprocessor. When interfacing with a TMS320 DSP, an additional frame sync signal (FS) indicates the start of a serial data frame. The device allows high-speed data transfers from the host. The INV CLK\ input provides further timing flexibility for the serial interface.

In addition to a high-speed converter and versatile control capability, the device has an on-chip 11-channel multiplexer that can select any one of eight analog inputs or any one of three internal self-test voltages. The sample-and-hold function is automatic except for the extended sampling cycle, where the sampling cycle is started by the falling edge of asynchronous CSTART\. At the end of the A/D conversion, the end-of-conversion (EOC) output goes high to indicate that the conversion is complete. The TLV1548 is designed to operate with a wide range of supply voltages with very low power consumption. The power saving feature is further enhanced with a software-programmed power-down mode and conversion rate. The converter incorporated in the device features differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating temperature range.

The TLV1548 has eight analog input channels. The TLV1548Q is characterized for operation from –40°C to 125°C.

The TLV1548 is a CMOS 10-bit switched-capacitor successive-approximation (SAR) analog-to-digital (A/D) converter. The device has a chip select (CS)\, input-output clock (I/O CLK), data input (DATA IN) and serial data output (DATA OUT) that provides a direct 4-wire synchronous serial peripheral interface (SPI™, QSPI™) port of a host microprocessor. When interfacing with a TMS320 DSP, an additional frame sync signal (FS) indicates the start of a serial data frame. The device allows high-speed data transfers from the host. The INV CLK\ input provides further timing flexibility for the serial interface.

In addition to a high-speed converter and versatile control capability, the device has an on-chip 11-channel multiplexer that can select any one of eight analog inputs or any one of three internal self-test voltages. The sample-and-hold function is automatic except for the extended sampling cycle, where the sampling cycle is started by the falling edge of asynchronous CSTART\. At the end of the A/D conversion, the end-of-conversion (EOC) output goes high to indicate that the conversion is complete. The TLV1548 is designed to operate with a wide range of supply voltages with very low power consumption. The power saving feature is further enhanced with a software-programmed power-down mode and conversion rate. The converter incorporated in the device features differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating temperature range.

The TLV1548 has eight analog input channels. The TLV1548Q is characterized for operation from –40°C to 125°C.

다운로드 스크립트와 함께 비디오 보기 비디오

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능.
ADS7067 활성 GPIO 및 SPI를 지원하는 8채널, 800kSPS, 16비트 SAR 아날로그-디지털 컨버터(ADC) Higher resolution, higher speed, commercial grade
ADS1278-EP 활성 개선된 제품 8진, 144kHz, 동시 샘플링 24비트 델타 시그마 ADC Higher resolution, higher speed, different interface, different architecture

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
5개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 Low-Voltage 10-Bit Analog-to-Digital Converter w/Serial Control & 8 Analog Input datasheet (Rev. A) 2003. 12. 5
* VID TLV1548-EP VID V6204618 2016. 6. 21
e북 Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015. 5. 21
애플리케이션 노트 Determining Minimum Acquisition Times for SAR ADCs, part 2 2011. 3. 17
애플리케이션 노트 Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) 2010. 11. 10

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

설계 툴

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
지원되는 제품 및 하드웨어
패키지 CAD 기호, 풋프린트 및 3D 모델
SSOP (DB) 20 Ultra Librarian

주문 및 품질

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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