SN74F543

활성

3상 출력을 지원하는 8진 레지스터 트랜시버

제품 상세 정보

Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -15 Input type TTL Output type TTL Features Very high speed (tpd 5-10ns) Technology family F Rating Catalog Operating temperature range (°C) 0 to 70
Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -15 Input type TTL Output type TTL Features Very high speed (tpd 5-10ns) Technology family F Rating Catalog Operating temperature range (°C) 0 to 70
SOIC (DW) 24 159.65 mm² (15.5 mm × 10.3 mm) SSOP (DB) 24 63.96 mm² (8.2 mm × 7.8 mm)
  • 3-State True Outputs
  • Back-to-Back Registers for Storage
  • Package Options Include Plastic Small-Outline and Shrink Small-Outline Packages and Standard Plastic 300-mil DIPs

 

  • 3-State True Outputs
  • Back-to-Back Registers for Storage
  • Package Options Include Plastic Small-Outline and Shrink Small-Outline Packages and Standard Plastic 300-mil DIPs

 

The SN74F543 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable ( or ) and output enable ( or ) inputs are provided for each register to permit independent control in either direction of data flow. The A outputs are characterized to sink 24 mA while the B outputs are characterized to sink 64 mA.

The A-to-B enable () input must be low in order to enter data from A or to output data from B. Having low and low makes the A-to-B latches transparent; a subsequent low-to-high transition of puts the A latches in the storage mode. With and both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using the , , and inputs.

The SN74F543 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN74F543 is characterized for operation from 0°C to 70°C.

 

 

A-to-B data flow is shown; B-to-A flow control is the same except that it uses , , and .

Output level before the indicated steady-state input conditions were established.

The SN74F543 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable ( or ) and output enable ( or ) inputs are provided for each register to permit independent control in either direction of data flow. The A outputs are characterized to sink 24 mA while the B outputs are characterized to sink 64 mA.

The A-to-B enable () input must be low in order to enter data from A or to output data from B. Having low and low makes the A-to-B latches transparent; a subsequent low-to-high transition of puts the A latches in the storage mode. With and both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using the , , and inputs.

The SN74F543 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN74F543 is characterized for operation from 0°C to 70°C.

 

 

A-to-B data flow is shown; B-to-A flow control is the same except that it uses , , and .

Output level before the indicated steady-state input conditions were established.

다운로드

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀.
SN74LVTH543 활성 3상 출력을 지원하는 3.3V ABT 8진 레지스터 트랜시버 Voltage range 2.7V to 3.6V, average propagation delay 4.5ns, average drive strength 64mA

기술 자료

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* 데이터 시트 Octal Registered Transceiver With 3-State Outputs datasheet (Rev. B) 1993. 10. 1

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