SN74CBTD3305C

활성

-2V 언더슈트 보호 및 레벨 전환(액티브 하이) 기능을 지원하는 5V, 1:1(SPST), 2채널 버스 스위치

SN74CBTD3305C

활성

제품 상세 정보

Protocols Analog Configuration 1:1 SPST Number of channels 2 Bandwidth (MHz) 20 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5 CON (typ) (pF) 12.5 OFF-state leakage current (max) (µA) 10 Ron (max) (mΩ) 20000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 1:1 SPST Number of channels 2 Bandwidth (MHz) 20 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5 CON (typ) (pF) 12.5 OFF-state leakage current (max) (µA) 10 Ron (max) (mΩ) 20000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
TSSOP (PW) 8 19.2 mm² (3 mm × 6.4 mm) SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm)
  • Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
  • Integrated Diode to VCC Provides 5-V Input Down To 3.3-V Output Level Shift
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • VCC Operating Range From 4.5 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: USB Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

  • Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
  • Integrated Diode to VCC Provides 5-V Input Down To 3.3-V Output Level Shift
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • VCC Operating Range From 4.5 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: USB Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

The SN74CBTD3305C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. This device features an integrated diode in series with VCC to provide level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBTD3305C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBTD3305C is organized as two 1-bit bus switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE is high, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is low, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN74CBTD3305C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. This device features an integrated diode in series with VCC to provide level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBTD3305C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBTD3305C is organized as two 1-bit bus switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE is high, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is low, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

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비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀.
SN74CBT3305C 활성 -2V 언더슈트 보호 기능을 지원하는 5V, 1:1(SPST), 2채널 FET 버스 스위치(액티브 하이) Supports I2C and UART

기술 자료

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4개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 SN74CBTD3305C datasheet (Rev. A) 2003. 10. 15
애플리케이션 노트 Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022. 6. 2
애플리케이션 노트 Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021. 12. 1
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021. 1. 6

설계 및 개발

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평가 보드

DIP-ADAPTER-EVM — DIP 어댑터 평가 모듈

소형 표면 실장 IC(집적 회로)와 쉽고 빠르며 경제적인 방식으로 인터페이싱하는 방법을 제공하는 DIP 어댑터 평가 모듈(DIP-ADAPTER-EVM)로 연산 증폭기 프로토타이핑 및 테스트 속도를 높이세요. 제품에 포함된 Samtec 터미널 스트립을 사용하여 지원되는 연산 증폭기를 연결하거나 기존 회로에 직접 연결할 수 있습니다.

DIP 어댑터 EVM 키트는 다음을 포함해 가장 널리 사용되는 6개의 업계 표준 패키지를 지원합니다.

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  • PW(TSSOP-8)
  • DGK(MSOP-8, VSSOP-8)
  • (...)
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LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

EVM-LEADED1 보드를 사용하면 TI의 공통 리드가 있는 패키지를 브레드보드 방식으로 빠르게 테스트할 수 있습니다.  이 보드에는 TI의 D, DBQ, DCT, DCU, DDF, DGS, DGV 및 PW 표면 실장 패키지를 100mil DIP 헤더로 변환할 수 있는 풋프린트가 있습니다.     

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시뮬레이션 모델

SN74CBTD3305C IBIS Model

SCDM040.ZIP (14 KB) - IBIS 모델
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TSSOP (PW) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian

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